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ASoC: wm2200: Provide initial coefficient loading
Allow a coefficient set provided using the Wolfson callibration tools to be provided along with the firmware files. Currently only coefficient files which configure absolute register addresses are supported. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Mark Brown
parent
e10f871190
commit
6e87badd3f
2 changed files with 237 additions and 0 deletions
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@ -1150,6 +1150,192 @@ static int wm2200_dsp_load(struct snd_soc_codec *codec, int base)
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return ret;
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}
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static int wm2200_setup_algs(struct snd_soc_codec *codec, int base)
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{
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struct regmap *regmap = codec->control_data;
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struct wmfw_adsp1_id_hdr id;
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struct wmfw_adsp1_alg_hdr *alg;
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size_t algs;
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int zm, dm, pm, ret, i;
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__be32 val;
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switch (base) {
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case WM2200_DSP1_CONTROL_1:
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dm = WM2200_DSP1_DM_BASE;
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pm = WM2200_DSP1_PM_BASE;
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zm = WM2200_DSP1_ZM_BASE;
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break;
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case WM2200_DSP2_CONTROL_1:
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dm = WM2200_DSP2_DM_BASE;
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pm = WM2200_DSP2_PM_BASE;
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zm = WM2200_DSP2_ZM_BASE;
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break;
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default:
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dev_err(codec->dev, "BASE %x\n", base);
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BUG_ON(1);
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return -EINVAL;
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}
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ret = regmap_raw_read(regmap, dm, &id, sizeof(id));
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if (ret != 0) {
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dev_err(codec->dev, "Failed to read algorithm info: %d\n",
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ret);
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return ret;
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}
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algs = be32_to_cpu(id.algs);
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dev_info(codec->dev, "Firmware: %x v%d.%d.%d, %d algorithms\n",
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be32_to_cpu(id.fw.id),
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(be32_to_cpu(id.fw.ver) & 0xff000) >> 16,
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(be32_to_cpu(id.fw.ver) & 0xff00) >> 8,
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be32_to_cpu(id.fw.ver) & 0xff,
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algs);
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/* Read the terminator first to validate the length */
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ret = regmap_raw_read(regmap, dm +
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(sizeof(id) + (algs * sizeof(*alg))) / 2,
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&val, sizeof(val));
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if (ret != 0) {
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dev_err(codec->dev, "Failed to read algorithm list end: %d\n",
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ret);
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return ret;
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}
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if (be32_to_cpu(val) != 0xbedead)
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dev_warn(codec->dev, "Algorithm list end %x 0x%x != 0xbeadead\n",
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(sizeof(id) + (algs * sizeof(*alg))) / 2,
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be32_to_cpu(val));
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alg = kzalloc(sizeof(*alg) * algs, GFP_KERNEL);
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if (!alg)
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return -ENOMEM;
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ret = regmap_raw_read(regmap, dm + (sizeof(id) / 2),
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alg, algs * sizeof(*alg));
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if (ret != 0) {
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dev_err(codec->dev, "Failed to read algorithm list: %d\n",
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ret);
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goto out;
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}
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for (i = 0; i < algs; i++) {
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dev_info(codec->dev, "%d: ID %x v%d.%d.%d\n",
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i, be32_to_cpu(alg[i].alg.id),
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(be32_to_cpu(alg[i].alg.ver) & 0xff000) >> 16,
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(be32_to_cpu(alg[i].alg.ver) & 0xff00) >> 8,
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be32_to_cpu(alg[i].alg.ver) & 0xff);
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}
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out:
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kfree(alg);
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return ret;
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}
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static int wm2200_load_coeff(struct snd_soc_codec *codec, int base)
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{
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struct regmap *regmap = codec->control_data;
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struct wmfw_coeff_hdr *hdr;
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struct wmfw_coeff_item *blk;
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const struct firmware *firmware;
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const char *file, *region_name;
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int ret, dm, pm, zm, pos, blocks, type, offset, reg;
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switch (base) {
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case WM2200_DSP1_CONTROL_1:
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file = "wm2200-dsp1.bin";
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dm = WM2200_DSP1_DM_BASE;
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pm = WM2200_DSP1_PM_BASE;
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zm = WM2200_DSP1_ZM_BASE;
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break;
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case WM2200_DSP2_CONTROL_1:
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file = "wm2200-dsp2.bin";
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dm = WM2200_DSP2_DM_BASE;
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pm = WM2200_DSP2_PM_BASE;
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zm = WM2200_DSP2_ZM_BASE;
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break;
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default:
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dev_err(codec->dev, "BASE %x\n", base);
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BUG_ON(1);
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return -EINVAL;
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}
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ret = request_firmware(&firmware, file, codec->dev);
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if (ret != 0) {
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dev_err(codec->dev, "Failed to request '%s'\n", file);
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return ret;
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}
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if (sizeof(*hdr) >= firmware->size) {
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dev_err(codec->dev, "%s: file too short, %d bytes\n",
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file, firmware->size);
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return -EINVAL;
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}
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hdr = (void*)&firmware->data[0];
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if (memcmp(hdr->magic, "WMDR", 4) != 0) {
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dev_err(codec->dev, "%s: invalid magic\n", file);
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return -EINVAL;
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}
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dev_dbg(codec->dev, "%s: v%d.%d.%d\n", file,
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(le32_to_cpu(hdr->ver) >> 16) & 0xff,
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(le32_to_cpu(hdr->ver) >> 8) & 0xff,
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le32_to_cpu(hdr->ver) & 0xff);
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pos = le32_to_cpu(hdr->len);
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blocks = 0;
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while (pos < firmware->size &&
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pos - firmware->size > sizeof(*blk)) {
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blk = (void*)(&firmware->data[pos]);
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type = be32_to_cpu(blk->type) & 0xff;
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offset = le32_to_cpu(blk->offset) & 0xffffff;
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dev_dbg(codec->dev, "%s.%d: %x v%d.%d.%d\n",
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file, blocks, le32_to_cpu(blk->id),
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(le32_to_cpu(blk->ver) >> 16) & 0xff,
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(le32_to_cpu(blk->ver) >> 8) & 0xff,
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le32_to_cpu(blk->ver) & 0xff);
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dev_dbg(codec->dev, "%s.%d: %d bytes at 0x%x in %x\n",
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file, blocks, le32_to_cpu(blk->len), offset, type);
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reg = 0;
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region_name = "Unknown";
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switch (type) {
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case WMFW_NAME_TEXT:
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case WMFW_INFO_TEXT:
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break;
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case WMFW_ABSOLUTE:
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region_name = "register";
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reg = offset;
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break;
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default:
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dev_err(codec->dev, "Unknown region type %x\n", type);
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break;
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}
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if (reg) {
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ret = regmap_raw_write(regmap, reg, blk->data,
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le32_to_cpu(blk->len));
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if (ret != 0) {
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dev_err(codec->dev,
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"%s.%d: Failed to write to %x in %s\n",
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file, blocks, reg, region_name);
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}
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}
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pos += le32_to_cpu(blk->len) + sizeof(*blk);
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blocks++;
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}
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if (pos > firmware->size)
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dev_warn(codec->dev, "%s.%d: %d bytes at end of file\n",
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file, blocks, pos - firmware->size);
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return 0;
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}
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static int wm2200_dsp_ev(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol,
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int event)
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@ -1164,6 +1350,14 @@ static int wm2200_dsp_ev(struct snd_soc_dapm_widget *w,
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if (ret != 0)
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return ret;
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ret = wm2200_setup_algs(codec, base);
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if (ret != 0)
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return ret;
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ret = wm2200_load_coeff(codec, base);
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if (ret != 0)
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return ret;
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/* Start the core running */
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snd_soc_update_bits(codec, w->reg,
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WM2200_DSP1_CORE_ENA | WM2200_DSP1_START,
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@ -43,6 +43,49 @@ struct wmfw_region {
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u8 data[];
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} __packed;
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struct wmfw_id_hdr {
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__be32 core_id;
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__be32 core_rev;
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__be32 id;
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__be32 ver;
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} __packed;
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struct wmfw_adsp1_id_hdr {
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struct wmfw_id_hdr fw;
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__be32 zm;
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__be32 dm;
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__be32 algs;
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} __packed;
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struct wmfw_alg_hdr {
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__be32 id;
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__be32 ver;
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} __packed;
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struct wmfw_adsp1_alg_hdr {
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struct wmfw_alg_hdr alg;
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__be32 zm;
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__be32 dm;
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} __packed;
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struct wmfw_coeff_hdr {
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u8 magic[4];
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__le32 len;
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__le32 ver;
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u8 data[];
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} __packed;
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struct wmfw_coeff_item {
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union {
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__be32 type;
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__le32 offset;
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};
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__le32 id;
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__le32 ver;
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__le32 sr;
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__le32 len;
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u8 data[];
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} __packed;
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#define WMFW_ADSP1 1
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#define WMFW_ABSOLUTE 0xf0
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