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dt-bindings: fsl-dma: fsl-edma: add edma3 compatible string
Extend Freescale eDMA driver bindings to support eDMA3 IP blocks in i.MX8QM and i.MX8QXP SoCs. In i.MX93, both eDMA3 and eDMA4 are now. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-12-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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1 changed files with 99 additions and 7 deletions
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@ -21,32 +21,41 @@ properties:
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- enum:
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- enum:
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- fsl,vf610-edma
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- fsl,vf610-edma
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- fsl,imx7ulp-edma
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- fsl,imx7ulp-edma
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- fsl,imx8qm-adma
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- fsl,imx8qm-edma
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- fsl,imx93-edma3
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- fsl,imx93-edma4
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- items:
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- items:
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- const: fsl,ls1028a-edma
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- const: fsl,ls1028a-edma
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- const: fsl,vf610-edma
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- const: fsl,vf610-edma
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reg:
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reg:
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minItems: 2
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minItems: 1
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maxItems: 3
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maxItems: 3
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interrupts:
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interrupts:
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minItems: 2
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minItems: 1
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maxItems: 17
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maxItems: 64
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interrupt-names:
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interrupt-names:
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minItems: 2
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minItems: 1
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maxItems: 17
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maxItems: 64
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"#dma-cells":
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"#dma-cells":
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const: 2
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enum:
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- 2
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- 3
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dma-channels:
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dma-channels:
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const: 32
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minItems: 1
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maxItems: 64
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clocks:
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clocks:
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minItems: 1
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maxItems: 2
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maxItems: 2
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clock-names:
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clock-names:
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minItems: 1
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maxItems: 2
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maxItems: 2
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big-endian:
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big-endian:
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@ -65,6 +74,29 @@ required:
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allOf:
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allOf:
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- $ref: dma-controller.yaml#
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- $ref: dma-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,imx8qm-adma
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- fsl,imx8qm-edma
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- fsl,imx93-edma3
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- fsl,imx93-edma4
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then:
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properties:
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"#dma-cells":
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const: 3
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# It is not necessary to write the interrupt name for each channel.
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# instead, you can simply maintain the sequential IRQ numbers as
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# defined for the DMA channels.
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interrupt-names: false
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clock-names:
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items:
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- const: dma
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clocks:
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maxItems: 1
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- if:
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- if:
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properties:
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properties:
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compatible:
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compatible:
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@ -72,18 +104,26 @@ allOf:
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const: fsl,vf610-edma
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const: fsl,vf610-edma
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then:
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then:
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properties:
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properties:
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clocks:
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minItems: 2
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clock-names:
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clock-names:
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items:
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items:
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- const: dmamux0
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- const: dmamux0
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- const: dmamux1
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- const: dmamux1
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interrupts:
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interrupts:
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minItems: 2
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maxItems: 2
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maxItems: 2
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interrupt-names:
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interrupt-names:
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items:
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items:
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- const: edma-tx
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- const: edma-tx
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- const: edma-err
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- const: edma-err
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reg:
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reg:
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minItems: 2
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maxItems: 3
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maxItems: 3
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"#dma-cells":
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const: 2
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dma-channels:
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const: 32
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- if:
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- if:
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properties:
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properties:
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@ -92,14 +132,22 @@ allOf:
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const: fsl,imx7ulp-edma
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const: fsl,imx7ulp-edma
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then:
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then:
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properties:
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properties:
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clock:
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minItems: 2
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clock-names:
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clock-names:
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items:
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items:
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- const: dma
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- const: dma
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- const: dmamux0
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- const: dmamux0
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interrupts:
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interrupts:
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minItems: 2
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maxItems: 17
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maxItems: 17
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reg:
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reg:
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minItems: 2
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maxItems: 2
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maxItems: 2
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"#dma-cells":
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const: 2
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dma-channels:
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const: 32
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unevaluatedProperties: false
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unevaluatedProperties: false
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@ -153,3 +201,47 @@ examples:
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clock-names = "dma", "dmamux0";
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clock-names = "dma", "dmamux0";
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clocks = <&pcc2 IMX7ULP_CLK_DMA1>, <&pcc2 IMX7ULP_CLK_DMA_MUX1>;
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clocks = <&pcc2 IMX7ULP_CLK_DMA1>, <&pcc2 IMX7ULP_CLK_DMA_MUX1>;
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};
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/imx93-clock.h>
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dma-controller@44000000 {
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compatible = "fsl,imx93-edma3";
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reg = <0x44000000 0x200000>;
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#dma-cells = <3>;
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dma-channels = <31>;
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interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX93_CLK_EDMA1_GATE>;
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clock-names = "dma";
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};
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