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i2c: iproc: Add recovery mechanism in error case
Add proper recovery mechanism to the iProc I2C driver in error cases. Signed-off-by: Icarus Chau <ichau@broadcom.com> Signed-off-by: Ray Jui <rjui@broadcom.com> Tested-by: Icarus Chau <ichau@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> [wsa: whitespace fixes] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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61c18aeb05
commit
6ee608c1c9
1 changed files with 48 additions and 43 deletions
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@ -119,6 +119,48 @@ static irqreturn_t bcm_iproc_i2c_isr(int irq, void *data)
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return IRQ_HANDLED;
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}
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static int bcm_iproc_i2c_init(struct bcm_iproc_i2c_dev *iproc_i2c)
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{
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u32 val;
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/* put controller in reset */
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val = readl(iproc_i2c->base + CFG_OFFSET);
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val |= 1 << CFG_RESET_SHIFT;
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val &= ~(1 << CFG_EN_SHIFT);
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writel(val, iproc_i2c->base + CFG_OFFSET);
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/* wait 100 usec per spec */
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udelay(100);
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/* bring controller out of reset */
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val &= ~(1 << CFG_RESET_SHIFT);
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writel(val, iproc_i2c->base + CFG_OFFSET);
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/* flush TX/RX FIFOs and set RX FIFO threshold to zero */
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val = (1 << M_FIFO_RX_FLUSH_SHIFT) | (1 << M_FIFO_TX_FLUSH_SHIFT);
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writel(val, iproc_i2c->base + M_FIFO_CTRL_OFFSET);
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/* disable all interrupts */
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writel(0, iproc_i2c->base + IE_OFFSET);
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/* clear all pending interrupts */
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writel(0xffffffff, iproc_i2c->base + IS_OFFSET);
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return 0;
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}
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static void bcm_iproc_i2c_enable_disable(struct bcm_iproc_i2c_dev *iproc_i2c,
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bool enable)
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{
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u32 val;
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val = readl(iproc_i2c->base + CFG_OFFSET);
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if (enable)
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val |= BIT(CFG_EN_SHIFT);
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else
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val &= ~BIT(CFG_EN_SHIFT);
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writel(val, iproc_i2c->base + CFG_OFFSET);
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}
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static int bcm_iproc_i2c_check_status(struct bcm_iproc_i2c_dev *iproc_i2c,
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struct i2c_msg *msg)
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{
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@ -149,6 +191,12 @@ static int bcm_iproc_i2c_check_status(struct bcm_iproc_i2c_dev *iproc_i2c,
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default:
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dev_dbg(iproc_i2c->device, "unknown error code=%d\n", val);
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/* re-initialize i2c for recovery */
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bcm_iproc_i2c_enable_disable(iproc_i2c, false);
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bcm_iproc_i2c_init(iproc_i2c);
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bcm_iproc_i2c_enable_disable(iproc_i2c, true);
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return -EIO;
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}
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}
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@ -321,49 +369,6 @@ static int bcm_iproc_i2c_cfg_speed(struct bcm_iproc_i2c_dev *iproc_i2c)
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return 0;
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}
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static int bcm_iproc_i2c_init(struct bcm_iproc_i2c_dev *iproc_i2c)
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{
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u32 val;
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/* put controller in reset */
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val = readl(iproc_i2c->base + CFG_OFFSET);
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val |= 1 << CFG_RESET_SHIFT;
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val &= ~(1 << CFG_EN_SHIFT);
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writel(val, iproc_i2c->base + CFG_OFFSET);
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/* wait 100 usec per spec */
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udelay(100);
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/* bring controller out of reset */
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val &= ~(1 << CFG_RESET_SHIFT);
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writel(val, iproc_i2c->base + CFG_OFFSET);
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/* flush TX/RX FIFOs and set RX FIFO threshold to zero */
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val = (1 << M_FIFO_RX_FLUSH_SHIFT) | (1 << M_FIFO_TX_FLUSH_SHIFT);
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writel(val, iproc_i2c->base + M_FIFO_CTRL_OFFSET);
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/* disable all interrupts */
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writel(0, iproc_i2c->base + IE_OFFSET);
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/* clear all pending interrupts */
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writel(0xffffffff, iproc_i2c->base + IS_OFFSET);
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return 0;
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}
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static void bcm_iproc_i2c_enable_disable(struct bcm_iproc_i2c_dev *iproc_i2c,
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bool enable)
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{
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u32 val;
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val = readl(iproc_i2c->base + CFG_OFFSET);
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if (enable)
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val |= BIT(CFG_EN_SHIFT);
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else
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val &= ~BIT(CFG_EN_SHIFT);
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writel(val, iproc_i2c->base + CFG_OFFSET);
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}
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static int bcm_iproc_i2c_probe(struct platform_device *pdev)
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{
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int irq, ret = 0;
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