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regualtor: pfuze100: correct sw1a/sw2 on pfuze3000
PFUZE100_SWB_REG is not proper for sw1a/sw2, because enable_mask/enable_reg
is not correct. On PFUZE3000, sw1a/sw2 should be the same as sw1a/sw2 on
pfuze100 except that voltages are not linear, so add new PFUZE3000_SW_REG
and pfuze3000_sw_regulator_ops which like the non-linear PFUZE100_SW_REG
and pfuze100_sw_regulator_ops.
Fixes: 1dced996ee
("regulator: pfuze100: update voltage setting for pfuze3000 sw1a")
Reported-by: Christophe Meynard <Christophe.Meynard@ign.fr>
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Link: https://lore.kernel.org/r/1592171648-8752-1-git-send-email-yibin.gong@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
92919679d3
commit
6f1cf5257a
1 changed files with 39 additions and 21 deletions
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@ -209,6 +209,19 @@ static const struct regulator_ops pfuze100_swb_regulator_ops = {
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};
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static const struct regulator_ops pfuze3000_sw_regulator_ops = {
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.list_voltage = regulator_list_voltage_table,
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.map_voltage = regulator_map_voltage_ascend,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.set_ramp_delay = pfuze100_set_ramp_delay,
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};
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#define PFUZE100_FIXED_REG(_chip, _name, base, voltage) \
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[_chip ## _ ## _name] = { \
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.desc = { \
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@ -318,23 +331,28 @@ static const struct regulator_ops pfuze100_swb_regulator_ops = {
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.stby_mask = 0x20, \
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}
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#define PFUZE3000_SW2_REG(_chip, _name, base, min, max, step) { \
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.desc = { \
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.name = #_name,\
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.ops = &pfuze100_sw_regulator_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = _chip ## _ ## _name, \
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.owner = THIS_MODULE, \
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.min_uV = (min), \
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.uV_step = (step), \
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.vsel_reg = (base) + PFUZE100_VOL_OFFSET, \
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.vsel_mask = 0x7, \
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}, \
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.stby_reg = (base) + PFUZE100_STANDBY_OFFSET, \
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.stby_mask = 0x7, \
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}
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/* No linar case for the some switches of PFUZE3000 */
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#define PFUZE3000_SW_REG(_chip, _name, base, mask, voltages) \
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[_chip ## _ ## _name] = { \
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.desc = { \
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.name = #_name, \
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.n_voltages = ARRAY_SIZE(voltages), \
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.ops = &pfuze3000_sw_regulator_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = _chip ## _ ## _name, \
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.owner = THIS_MODULE, \
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.volt_table = voltages, \
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.vsel_reg = (base) + PFUZE100_VOL_OFFSET, \
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.vsel_mask = (mask), \
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.enable_reg = (base) + PFUZE100_MODE_OFFSET, \
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.enable_mask = 0xf, \
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.enable_val = 0x8, \
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.enable_time = 500, \
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}, \
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.stby_reg = (base) + PFUZE100_STANDBY_OFFSET, \
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.stby_mask = (mask), \
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.sw_reg = true, \
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}
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#define PFUZE3000_SW3_REG(_chip, _name, base, min, max, step) { \
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.desc = { \
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@ -391,9 +409,9 @@ static struct pfuze_regulator pfuze200_regulators[] = {
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};
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static struct pfuze_regulator pfuze3000_regulators[] = {
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PFUZE100_SWB_REG(PFUZE3000, SW1A, PFUZE100_SW1ABVOL, 0x1f, pfuze3000_sw1a),
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PFUZE3000_SW_REG(PFUZE3000, SW1A, PFUZE100_SW1ABVOL, 0x1f, pfuze3000_sw1a),
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PFUZE100_SW_REG(PFUZE3000, SW1B, PFUZE100_SW1CVOL, 700000, 1475000, 25000),
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PFUZE100_SWB_REG(PFUZE3000, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
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PFUZE3000_SW_REG(PFUZE3000, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
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PFUZE3000_SW3_REG(PFUZE3000, SW3, PFUZE100_SW3AVOL, 900000, 1650000, 50000),
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PFUZE100_SWB_REG(PFUZE3000, SWBST, PFUZE100_SWBSTCON1, 0x3, pfuze100_swbst),
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PFUZE100_SWB_REG(PFUZE3000, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
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@ -407,8 +425,8 @@ static struct pfuze_regulator pfuze3000_regulators[] = {
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};
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static struct pfuze_regulator pfuze3001_regulators[] = {
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PFUZE100_SWB_REG(PFUZE3001, SW1, PFUZE100_SW1ABVOL, 0x1f, pfuze3000_sw1a),
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PFUZE100_SWB_REG(PFUZE3001, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
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PFUZE3000_SW_REG(PFUZE3001, SW1, PFUZE100_SW1ABVOL, 0x1f, pfuze3000_sw1a),
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PFUZE3000_SW_REG(PFUZE3001, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
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PFUZE3000_SW3_REG(PFUZE3001, SW3, PFUZE100_SW3AVOL, 900000, 1650000, 50000),
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PFUZE100_SWB_REG(PFUZE3001, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
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PFUZE100_VGEN_REG(PFUZE3001, VLDO1, PFUZE100_VGEN1VOL, 1800000, 3300000, 100000),
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