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i2c: piix4: Avoid race conditions with IMC
On AMD's SB800 and upwards, the SMBus is shared with the Integrated Micro Controller (IMC). The platform provides a hardware semaphore to avoid race conditions among them. (Check page 288 of the SB800-Series Southbridges Register Reference Guide http://support.amd.com/TechDocs/45482.pdf) Without this patch, many access to the SMBus end with an invalid transaction or even with the bus stalled. Reported-by: Alexandre Desnoyers <alex@qtec.com> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>: Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -585,10 +585,29 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr,
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u8 command, int size, union i2c_smbus_data *data)
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{
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struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
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unsigned short piix4_smba = adapdata->smba;
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int retries = MAX_TIMEOUT;
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int smbslvcnt;
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u8 smba_en_lo;
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u8 port;
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int retval;
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/* Request the SMBUS semaphore, avoid conflicts with the IMC */
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smbslvcnt = inb_p(SMBSLVCNT);
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do {
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outb_p(smbslvcnt | 0x10, SMBSLVCNT);
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/* Check the semaphore status */
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smbslvcnt = inb_p(SMBSLVCNT);
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if (smbslvcnt & 0x10)
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break;
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usleep_range(1000, 2000);
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} while (--retries);
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/* SMBus is still owned by the IMC, we give up */
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if (!retries)
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return -EBUSY;
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mutex_lock(&piix4_mutex_sb800);
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outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX);
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@ -606,6 +625,9 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr,
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mutex_unlock(&piix4_mutex_sb800);
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/* Release the semaphore */
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outb_p(smbslvcnt | 0x20, SMBSLVCNT);
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return retval;
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}
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