Devicetree updates for v6.1:

DT core:
 
 - Fix node refcounting in of_find_last_cache_level()
 
 - Constify device_node in of_device_compatible_match()
 
 - Fix 'dma-ranges' handling in bus controller nodes
 
 - Fix handling of initrd start > end
 
 - Improve error reporting in of_irq_init()
 
 - Taint kernel on DT unittest running
 
 - Use strscpy instead of strlcpy
 
 - Add a build target, dt_compatible_check, to check for
   compatible strings used in kernel sources against compatible strings
   in DT schemas.
 
 - Handle DT_SCHEMA_FILES changes when rebuilding
 
 DT bindings:
 
 - LED bindings for MT6370 PMIC
 
 - Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller,
   mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc,
   and arm,versatile-sysreg to DT schema format
 
 - Add nvmem cells to u-boot,env schema
 
 - Add more LED_COLOR_ID definitions
 
 - Require 'opp-table' uses to be a node
 
 - Various schema fixes to match QEMU 'virt' DT usage
 
 - Tree wide dropping of redundant 'Device Tree Binding' in schema titles
 
 - More (unevaluated|additional)Properties fixes in schema child nodes
 
 - Drop various redundant minItems equal to maxItems
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Merge tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:
 "DT core:

   - Fix node refcounting in of_find_last_cache_level()

   - Constify device_node in of_device_compatible_match()

   - Fix 'dma-ranges' handling in bus controller nodes

   - Fix handling of initrd start > end

   - Improve error reporting in of_irq_init()

   - Taint kernel on DT unittest running

   - Use strscpy instead of strlcpy

   - Add a build target, dt_compatible_check, to check for compatible
     strings used in kernel sources against compatible strings in DT
     schemas.

   - Handle DT_SCHEMA_FILES changes when rebuilding

  DT bindings:

   - LED bindings for MT6370 PMIC

   - Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller,
     mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc,
     and arm,versatile-sysreg to DT schema format

   - Add nvmem cells to u-boot,env schema

   - Add more LED_COLOR_ID definitions

   - Require 'opp-table' uses to be a node

   - Various schema fixes to match QEMU 'virt' DT usage

   - Tree wide dropping of redundant 'Device Tree Binding' in schema
     titles

   - More (unevaluated|additional)Properties fixes in schema child nodes

   - Drop various redundant minItems equal to maxItems"

* tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (62 commits)
  of: base: Shift refcount decrement in of_find_last_cache_level()
  dt-bindings: leds: Add MediaTek MT6370 flashlight
  dt-bindings: leds: mt6370: Add MediaTek MT6370 current sink type LED indicator
  dt-bindings: mailbox: Convert mtk-gce to DT schema
  of: base: make of_device_compatible_match() accept const device node
  of: Fix "dma-ranges" handling for bus controllers
  of: fdt: Remove unused struct fdt_scan_status
  dt-bindings: display: st,stm32-dsi: Handle data-lanes in DSI port node
  dt-bindings: timer: Add power-domains for TI timer-dm on K3
  dt: Add a check for undocumented compatible strings in kernel
  kbuild: take into account DT_SCHEMA_FILES changes while checking dtbs
  dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML
  dt-bindings: i2c: migrate mt7621 text bindings to YAML
  dt-bindings: power: gpcv2: correct patternProperties
  dt-bindings: virtio: Convert virtio,pci-iommu to DT schema
  dt-bindings: timer: arm,arch_timer: Allow dual compatible string
  dt-bindings: arm: cpus: Add kryo240 compatible
  dt-bindings: display: bridge: nxp,tda998x: Convert to json-schema
  dt-bindings: nvmem: u-boot,env: add basic NVMEM cells
  dt-bindings: remoteproc: qcom,adsp: enforce smd-edge schema
  ...
This commit is contained in:
Linus Torvalds 2022-10-10 13:13:51 -07:00
commit 706eacadd5
445 changed files with 1467 additions and 993 deletions

View File

@ -75,3 +75,6 @@ always-$(CHECK_DT_BINDING) += $(patsubst $(srctree)/$(src)/%.yaml,%.example.dtb,
# build artifacts here before they are processed by scripts/Makefile.clean
clean-files = $(shell find $(obj) \( -name '*.example.dts' -o \
-name '*.example.dtb' \) -delete 2>/dev/null)
dt_compatible_check: $(obj)/processed-schema.json
$(Q)$(srctree)/scripts/dtc/dt-extract-compatibles $(srctree) | xargs dt-check-compatible -v -s $<

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/actions.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Actions Semi platforms device tree bindings
title: Actions Semi platforms
maintainers:
- Andreas Färber <afaerber@suse.de>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/airoha.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Airoha SoC based Platforms Device Tree Bindings
title: Airoha SoC based Platforms
maintainers:
- Felix Fietkau <nbd@nbd.name>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/altera.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Altera's SoCFPGA platform device tree bindings
title: Altera's SoCFPGA platform
maintainers:
- Dinh Nguyen <dinguyen@kernel.org>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/amazon,al.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amazon's Annapurna Labs Alpine Platform Device Tree Bindings
title: Amazon's Annapurna Labs Alpine Platform
maintainers:
- Hanna Hawa <hhhawa@amazon.com>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/amlogic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic MesonX device tree bindings
title: Amlogic MesonX
maintainers:
- Kevin Hilman <khilman@baylibre.com>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/apple.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Apple ARM Machine Device Tree Bindings
title: Apple ARM Machine
maintainers:
- Hector Martin <marcan@marcan.st>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/arm,cci-400.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM CCI Cache Coherent Interconnect Device Tree Binding
title: ARM CCI Cache Coherent Interconnect
maintainers:
- Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/arm,corstone1000.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Corstone1000 Device Tree Bindings
title: ARM Corstone1000
maintainers:
- Vishnu Banavath <vishnu.banavath@arm.com>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/arm,integrator.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Integrator Boards Device Tree Bindings
title: ARM Integrator Boards
maintainers:
- Linus Walleij <linus.walleij@linaro.org>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/arm,realview.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM RealView Boards Device Tree Bindings
title: ARM RealView Boards
maintainers:
- Linus Walleij <linus.walleij@linaro.org>

View File

@ -0,0 +1,35 @@
# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/arm,versatile-sysreg.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Arm Versatile system registers
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
description:
This is a system control registers block, providing multiple low level
platform functions like board detection and identification, software
interrupt generation, MMC and NOR Flash control, etc.
properties:
compatible:
items:
- const: arm,versatile-sysreg
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
panel:
type: object
required:
- compatible
- reg
additionalProperties: false
...

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/arm,versatile.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Versatile Boards Device Tree Bindings
title: ARM Versatile Boards
maintainers:
- Linus Walleij <linus.walleij@linaro.org>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Versatile Express and Juno Boards Device Tree Bindings
title: ARM Versatile Express and Juno Boards
maintainers:
- Sudeep Holla <sudeep.holla@arm.com>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/atmel-at91.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel AT91 device tree bindings.
title: Atmel AT91.
maintainers:
- Alexandre Belloni <alexandre.belloni@bootlin.com>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/axxia.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Axxia AXM55xx device tree bindings
title: Axxia AXM55xx
maintainers:
- Anders Berg <anders.berg@lsi.com>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bitmain.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Bitmain platform device tree bindings
title: Bitmain platform
maintainers:
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/calxeda.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Calxeda Platforms Device Tree Bindings
title: Calxeda Platforms
maintainers:
- Rob Herring <robh@kernel.org>

View File

@ -174,6 +174,7 @@ properties:
- nvidia,tegra194-carmel
- qcom,krait
- qcom,kryo
- qcom,kryo240
- qcom,kryo250
- qcom,kryo260
- qcom,kryo280

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/digicolor.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Conexant Digicolor Platforms Device Tree Bindings
title: Conexant Digicolor Platforms
maintainers:
- Baruch Siach <baruch@tkos.co.il>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/fsl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX Platforms Device Tree Bindings
title: Freescale i.MX Platforms
maintainers:
- Shawn Guo <shawnguo@kernel.org>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/intel,keembay.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Keem Bay platform device tree bindings
title: Keem Bay platform
maintainers:
- Paul J. Murphy <paul.j.murphy@intel.com>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/intel,socfpga.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel SoCFPGA platform device tree bindings
title: Intel SoCFPGA platform
maintainers:
- Dinh Nguyen <dinguyen@kernel.org>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/intel-ixp4xx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel IXP4xx Device Tree Bindings
title: Intel IXP4xx
maintainers:
- Linus Walleij <linus.walleij@linaro.org>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/mediatek.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek SoC based Platforms Device Tree Bindings
title: MediaTek SoC based Platforms
maintainers:
- Sean Wang <sean.wang@mediatek.com>

View File

@ -53,7 +53,8 @@ properties:
description:
Using mailbox to communicate with GCE, it should have this
property and list of phandle, mailbox specifiers. See
Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml
for details.
$ref: /schemas/types.yaml#/definitions/phandle-array
mediatek,gce-client-reg:

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/microchip,sparx5.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip Sparx5 Boards Device Tree Bindings
title: Microchip Sparx5 Boards
maintainers:
- Lars Povlsen <lars.povlsen@microchip.com>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/moxart.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MOXA ART device tree bindings
title: MOXA ART
maintainers:
- Jonas Jensen <jonas.jensen@gmail.com>

View File

@ -4,7 +4,7 @@
$id: "http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: NVIDIA Tegra194 CPU Complex device tree bindings
title: NVIDIA Tegra194 CPU Complex
maintainers:
- Thierry Reding <thierry.reding@gmail.com>

View File

@ -41,31 +41,26 @@ properties:
For implementations complying to PSCI versions prior to 0.2.
const: arm,psci
- description:
For implementations complying to PSCI 0.2.
const: arm,psci-0.2
- description:
For implementations complying to PSCI 0.2.
Function IDs are not required and should be ignored by an OS with
PSCI 0.2 support, but are permitted to be present for compatibility
with existing software when "arm,psci" is later in the compatible
list.
minItems: 1
items:
- const: arm,psci-0.2
- const: arm,psci
- description:
For implementations complying to PSCI 1.0.
const: arm,psci-1.0
- description:
For implementations complying to PSCI 1.0.
PSCI 1.0 is backward compatible with PSCI 0.2 with minor
specification updates, as defined in the PSCI specification[2].
minItems: 1
items:
- const: arm,psci-1.0
- const: arm,psci-0.2
- const: arm,psci
method:
description: The method of calling the PSCI firmware.

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/qcom.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: QCOM device tree bindings
title: QCOM
maintainers:
- Bjorn Andersson <bjorn.andersson@linaro.org>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/rda.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: RDA Micro platforms device tree bindings
title: RDA Micro platforms
maintainers:
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/realtek.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Realtek platforms device tree bindings
title: Realtek platforms
maintainers:
- Andreas Färber <afaerber@suse.de>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/renesas.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings
title: Renesas SH-Mobile, R-Mobile, and R-Car Platform
maintainers:
- Geert Uytterhoeven <geert+renesas@glider.be>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/rockchip.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip platforms device tree bindings
title: Rockchip platforms
maintainers:
- Heiko Stuebner <heiko@sntech.de>

View File

@ -22,7 +22,6 @@ properties:
description: |
should contain 3 regions: control register, revision register,
operation register, in this order.
minItems: 3
maxItems: 3
interrupts:

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/spear.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ST SPEAr Platforms Device Tree Bindings
title: ST SPEAr Platforms
maintainers:
- Viresh Kumar <vireshk@kernel.org>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/sti.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ST STi Platforms Device Tree Bindings
title: ST STi Platforms
maintainers:
- Patrice Chotard <patrice.chotard@foss.st.com>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/sunxi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner platforms device tree bindings
title: Allwinner platforms
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/tegra.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra device tree bindings
title: NVIDIA Tegra
maintainers:
- Thierry Reding <thierry.reding@gmail.com>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/tesla.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Tesla Full Self Driving(FSD) platforms device tree bindings
title: Tesla Full Self Driving(FSD) platforms
maintainers:
- Alim Akhtar <alim.akhtar@samsung.com>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/toshiba.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Toshiba Visconti Platform Device Tree Bindings
title: Toshiba Visconti Platform
maintainers:
- Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/ux500.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ux500 platforms device tree bindings
title: Ux500 platforms
maintainers:
- Linus Walleij <linus.walleij@linaro.org>

View File

@ -1,10 +0,0 @@
ARM Versatile system registers
--------------------------------------
This is a system control registers block, providing multiple low level
platform functions like board detection and identification, software
interrupt generation, MMC and NOR Flash control etc.
Required node properties:
- compatible value : = "arm,versatile-sysreg", "syscon"
- reg : physical base address and the size of the registers window

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/vt8500.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: VIA/Wondermedia VT8500 Platforms Device Tree Bindings
title: VIA/Wondermedia VT8500 Platforms
maintainers:
- Tony Prisk <linux@prisktech.co.nz>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/xilinx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx Zynq Platforms Device Tree Bindings
title: Xilinx Zynq Platforms
maintainers:
- Michal Simek <michal.simek@xilinx.com>

View File

@ -30,7 +30,6 @@ properties:
- const: brcm,bcm-nsp-ahci
reg:
minItems: 2
maxItems: 2
reg-names:

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@ -22,7 +22,6 @@ properties:
maxItems: 1
resets:
minItems: 2
maxItems: 2
description: phandles to the reset lines for both SATA bridges
@ -32,7 +31,6 @@ properties:
- const: sata1
clocks:
minItems: 2
maxItems: 2
description: phandles to the compulsory peripheral clocks

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@ -52,7 +52,6 @@ properties:
minItems: 1
maxItems: 8
items:
minItems: 2
maxItems: 2
calxeda,tx-atten:

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/bus/allwinner,sun50i-a64-de2.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A64 Display Engine Bus Device Tree Bindings
title: Allwinner A64 Display Engine Bus
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/bus/allwinner,sun8i-a23-rsb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A23 RSB Device Tree Bindings
title: Allwinner A23 RSB
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/bus/palmbus.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ralink PalmBus Device Tree Bindings
title: Ralink PalmBus
maintainers:
- Sergio Paracuellos <sergio.paracuellos@gmail.com>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/airoha,en7523-scu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: EN7523 Clock Device Tree Bindings
title: EN7523 Clock
maintainers:
- Felix Fietkau <nbd@nbd.name>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ahb-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 AHB Clock Device Tree Bindings
title: Allwinner A10 AHB Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-apb0-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 APB0 Bus Clock Device Tree Bindings
title: Allwinner A10 APB0 Bus Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-apb1-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 APB1 Bus Clock Device Tree Bindings
title: Allwinner A10 APB1 Bus Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-axi-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 AXI Clock Device Tree Bindings
title: Allwinner A10 AXI Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ccu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner Clock Control Unit Device Tree Bindings
title: Allwinner Clock Control Unit
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-cpu-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 CPU Clock Device Tree Bindings
title: Allwinner A10 CPU Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-display-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 Display Clock Device Tree Bindings
title: Allwinner A10 Display Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-gates-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 Bus Gates Clock Device Tree Bindings
title: Allwinner A10 Bus Gates Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mbus-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 MBUS Clock Device Tree Bindings
title: Allwinner A10 MBUS Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mmc-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 Module 1 Clock Device Tree Bindings
title: Allwinner A10 Module 1 Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 Module 0 Clock Device Tree Bindings
title: Allwinner A10 Module 0 Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod1-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 Module 1 Clock Device Tree Bindings
title: Allwinner A10 Module 1 Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-osc-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 Gatable Oscillator Clock Device Tree Bindings
title: Allwinner A10 Gatable Oscillator Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll1-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 CPU PLL Device Tree Bindings
title: Allwinner A10 CPU PLL
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll3-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 Video PLL Device Tree Bindings
title: Allwinner A10 Video PLL
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll5-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 DRAM PLL Device Tree Bindings
title: Allwinner A10 DRAM PLL
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll6-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 Peripheral PLL Device Tree Bindings
title: Allwinner A10 Peripheral PLL
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 TCON Channel 0 Clock Device Tree Bindings
title: Allwinner A10 TCON Channel 0 Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-usb-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 USB Clock Device Tree Bindings
title: Allwinner A10 USB Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ve-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 Video Engine Clock Device Tree Bindings
title: Allwinner A10 Video Engine Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun5i-a13-ahb-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A13 AHB Clock Device Tree Bindings
title: Allwinner A13 AHB Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun6i-a31-pll6-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A31 Peripheral PLL Device Tree Bindings
title: Allwinner A31 Peripheral PLL
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun7i-a20-gmac-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A20 GMAC TX Clock Device Tree Bindings
title: Allwinner A20 GMAC TX Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun7i-a20-out-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A20 Output Clock Device Tree Bindings
title: Allwinner A20 Output Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun8i-a83t-de2-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A83t Display Engine 2/3 Clock Controller Device Tree Bindings
title: Allwinner A83t Display Engine 2/3 Clock Controller
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun8i-h3-bus-gates-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 Bus Gates Clock Device Tree Bindings
title: Allwinner A10 Bus Gates Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-ahb-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A80 AHB Clock Device Tree Bindings
title: Allwinner A80 AHB Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-apb0-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A80 APB0 Bus Clock Device Tree Bindings
title: Allwinner A80 APB0 Bus Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-cpus-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A80 CPUS Clock Device Tree Bindings
title: Allwinner A80 CPUS Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-de-clks.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A80 Display Engine Clock Controller Device Tree Bindings
title: Allwinner A80 Display Engine Clock Controller
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-gt-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A80 GT Bus Clock Device Tree Bindings
title: Allwinner A80 GT Bus Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-mmc-config-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A80 MMC Configuration Clock Device Tree Bindings
title: Allwinner A80 MMC Configuration Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-pll4-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A80 Peripheral PLL Device Tree Bindings
title: Allwinner A80 Peripheral PLL
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-clks.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A80 USB Clock Controller Device Tree Bindings
title: Allwinner A80 USB Clock Controller
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-mod-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A80 USB Module Clock Device Tree Bindings
title: Allwinner A80 USB Module Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-phy-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A80 USB PHY Clock Device Tree Bindings
title: Allwinner A80 USB PHY Clock
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/amlogic,meson8-ddr-clkc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic DDR Clock Controller Device Tree Bindings
title: Amlogic DDR Clock Controller
maintainers:
- Martin Blumenstingl <martin.blumenstingl@googlemail.com>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/brcm,bcm2711-dvp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom BCM2711 HDMI DVP Device Tree Bindings
title: Broadcom BCM2711 HDMI DVP
maintainers:
- Maxime Ripard <mripard@kernel.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/canaan,k210-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Canaan Kendryte K210 Clock Device Tree Bindings
title: Canaan Kendryte K210 Clock
maintainers:
- Damien Le Moal <damien.lemoal@wdc.com>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/mediatek,mt7621-sysc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MT7621 Clock Device Tree Bindings
title: MT7621 Clock
maintainers:
- Sergio Paracuellos <sergio.paracuellos@gmail.com>

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@ -5,7 +5,7 @@
$id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: SC9863A Clock Control Unit Device Tree Bindings
title: SC9863A Clock Control Unit
maintainers:
- Orson Zhai <orsonzhai@gmail.com>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/toshiba,tmpv770x-pipllct.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Toshiba Visconti5 TMPV770X PLL Controller Device Tree Bindings
title: Toshiba Visconti5 TMPV770X PLL Controller
maintainers:
- Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

View File

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/toshiba,tmpv770x-pismu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Toshiba Visconti5 TMPV770x SMU controller Device Tree Bindings
title: Toshiba Visconti5 TMPV770x SMU controller
maintainers:
- Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/crypto/allwinner,sun4i-a10-crypto.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 Security System Device Tree Bindings
title: Allwinner A10 Security System
maintainers:
- Chen-Yu Tsai <wens@csie.org>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-aes.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel Keem Bay OCS AES Device Tree Bindings
title: Intel Keem Bay OCS AES
maintainers:
- Daniele Alessandrelli <daniele.alessandrelli@intel.com>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-ecc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel Keem Bay OCS ECC Device Tree Bindings
title: Intel Keem Bay OCS ECC
maintainers:
- Daniele Alessandrelli <daniele.alessandrelli@intel.com>

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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel Keem Bay OCS HCU Device Tree Bindings
title: Intel Keem Bay OCS HCU
maintainers:
- Declan Murphy <declan.murphy@intel.com>

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