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arm64: compat: Add separate CP15 trapping hook
Instead of directly generating an UNDEF when trapping a CP15 access, let's add a new entry point to that effect (which only generates an UNDEF for now). Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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bd7ac140b8
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2 changed files with 26 additions and 2 deletions
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@ -697,9 +697,9 @@ el0_sync_compat:
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cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0
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b.eq el0_undef
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cmp x24, #ESR_ELx_EC_CP15_32 // CP15 MRC/MCR trap
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b.eq el0_undef
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b.eq el0_cp15
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cmp x24, #ESR_ELx_EC_CP15_64 // CP15 MRRC/MCRR trap
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b.eq el0_undef
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b.eq el0_cp15
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cmp x24, #ESR_ELx_EC_CP14_MR // CP14 MRC/MCR trap
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b.eq el0_undef
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cmp x24, #ESR_ELx_EC_CP14_LS // CP14 LDC/STC trap
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@ -722,6 +722,17 @@ el0_irq_compat:
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el0_error_compat:
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kernel_entry 0, 32
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b el0_error_naked
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el0_cp15:
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/*
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* Trapped CP15 (MRC, MCR, MRRC, MCRR) instructions
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*/
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enable_daif
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ct_user_exit
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mov x0, x25
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mov x1, sp
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bl do_cp15instr
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b ret_to_user
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#endif
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el0_da:
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@ -547,6 +547,19 @@ static struct sys64_hook sys64_hooks[] = {
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{},
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};
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#ifdef CONFIG_COMPAT
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asmlinkage void __exception do_cp15instr(unsigned int esr, struct pt_regs *regs)
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{
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/*
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* New cp15 instructions may previously have been undefined at
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* EL0. Fall back to our usual undefined instruction handler
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* so that we handle these consistently.
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*/
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do_undefinstr(regs);
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}
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#endif
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asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs)
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{
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struct sys64_hook *hook;
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