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orion fixes for v3.7
- dove irq fix - kirkwood pcie fix -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.19 (GNU/Linux) iQEcBAABAgAGBQJQravbAAoJEAi3KVZQDZAeuYgH+wZGHx1DPPtvdd62lMxDNFg+ 3ZXjCuSK/TZd5tpFhLjo34jcKgwjVBfkktF/qDMGOPmdpAepaG/rZ65phk5lIShO 2wR+kqZJrzITEL6Gdn69AezQWtvqSQ6Om2gLU03N2Q08xs2rva76PXye+krmgEuz smGAAcmd1IHzKAmJpLXTOiUC8ADrXtm1d8qQb2wU37G9cL8/qoQOTZ7QzWUcJKo8 Nl8b87bx81eG5Ym65I4ZGJjj6nXVEcwr5HBlVdQydt5xDzlyWPa8k8JqlT2H+9g/ zvbYYLHYNK+IEAhiBvHXDA3oMcfWWFguvKUizKHi1n6jSJN/siG9FF2/OKBgQSM= =9ha/ -----END PGP SIGNATURE----- Merge tag 'orion_fixes_for_3.7' of git://git.infradead.org/users/jcooper/linux into fixes From Jason Cooper: orion fixes for v3.7 - dove irq fix - kirkwood pcie fix * tag 'orion_fixes_for_3.7' of git://git.infradead.org/users/jcooper/linux: ARM: Kirkwood: Update PCI-E fixup Dove: Fix irq_to_pmu() Dove: Attempt to fix PMU/RTC interrupts
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commit
70e1584d47
4 changed files with 23 additions and 5 deletions
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@ -547,6 +547,7 @@ config ARCH_KIRKWOOD
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select CPU_FEROCEON
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select GENERIC_CLOCKEVENTS
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select PCI
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select PCI_QUIRKS
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select PLAT_ORION_LEGACY
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help
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Support for the following Marvell Kirkwood series SoCs:
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@ -63,7 +63,7 @@ static inline int pmu_to_irq(int pin)
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static inline int irq_to_pmu(int irq)
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{
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if (IRQ_DOVE_PMU_START < irq && irq < NR_IRQS)
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if (IRQ_DOVE_PMU_START <= irq && irq < NR_IRQS)
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return irq - IRQ_DOVE_PMU_START;
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return -EINVAL;
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@ -46,8 +46,20 @@ static void pmu_irq_ack(struct irq_data *d)
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int pin = irq_to_pmu(d->irq);
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u32 u;
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/*
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* The PMU mask register is not RW0C: it is RW. This means that
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* the bits take whatever value is written to them; if you write
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* a '1', you will set the interrupt.
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*
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* Unfortunately this means there is NO race free way to clear
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* these interrupts.
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*
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* So, let's structure the code so that the window is as small as
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* possible.
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*/
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u = ~(1 << (pin & 31));
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writel(u, PMU_INTERRUPT_CAUSE);
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u &= readl_relaxed(PMU_INTERRUPT_CAUSE);
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writel_relaxed(u, PMU_INTERRUPT_CAUSE);
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}
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static struct irq_chip pmu_irq_chip = {
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@ -207,14 +207,19 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
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return 1;
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}
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/*
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* The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it
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* is operating as a root complex this needs to be switched to
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* PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
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* the device. Decoding setup is handled by the orion code.
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*/
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static void __devinit rc_pci_fixup(struct pci_dev *dev)
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{
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/*
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* Prevent enumeration of root complex.
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*/
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if (dev->bus->parent == NULL && dev->devfn == 0) {
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int i;
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dev->class &= 0xff;
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dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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dev->resource[i].start = 0;
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dev->resource[i].end = 0;
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