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dt-bindings: mmc: sdhci-am654: Update Output tap delay binding
According to latest AM65x Data Manual[1], a different output tap delay value is recommended for all speed modes. Therefore, replace the ti,otap-del-sel binding with one ti,otap-del-sel- for each MMC/SD speed mode. [1] http://www.ti.com/lit/gpn/am6526 Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Link: https://lore.kernel.org/r/20200108150920.14547-2-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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1 changed files with 19 additions and 2 deletions
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@ -18,7 +18,20 @@ Required Properties:
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- clocks: Handles to the clock inputs.
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- clock-names: Tuple including "clk_xin" and "clk_ahb"
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- interrupts: Interrupt specifiers
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- ti,otap-del-sel: Output Tap Delay select
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Output tap delay for each speed mode:
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- ti,otap-del-sel-legacy
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- ti,otap-del-sel-mmc-hs
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- ti,otap-del-sel-sd-hs
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- ti,otap-del-sel-sdr12
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- ti,otap-del-sel-sdr25
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- ti,otap-del-sel-sdr50
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- ti,otap-del-sel-sdr104
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- ti,otap-del-sel-ddr50
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- ti,otap-del-sel-ddr52
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- ti,otap-del-sel-hs200
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- ti,otap-del-sel-hs400
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These bindings must be provided otherwise the driver will disable the
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corresponding speed mode (i.e. all nodes must provide at least -legacy)
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Optional Properties (Required for ti,am654-sdhci-5.1 and ti,j721e-sdhci-8bit):
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- ti,trm-icp: DLL trim select
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@ -38,6 +51,10 @@ Example:
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interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
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sdhci-caps-mask = <0x80000007 0x0>;
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mmc-ddr-1_8v;
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ti,otap-del-sel = <0x2>;
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ti,otap-del-sel-legacy = <0x0>;
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ti,otap-del-sel-mmc-hs = <0x0>;
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ti,otap-del-sel-ddr52 = <0x5>;
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ti,otap-del-sel-hs200 = <0x5>;
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ti,otap-del-sel-hs400 = <0x0>;
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ti,trm-icp = <0x8>;
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};
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