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Code Issues Releases Wiki Activity

DSI display for px30 evaluation board and a number of cleanups

Browse source 
accross multiple socs.
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Merge tag 'v5.6-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

DSI display for px30 evaluation board and a number of cleanups
accross multiple socs.

* tag 'v5.6-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Kill off "simple-panel" compatibles
  arm64: dts: rockchip: rename dwmmc node names to mmc
  arm64: dts: rockchip: hook up the px30-evb dsi display
  arm64: dts: rockchip: Enable sdio0 and uart0 on rk3399-roc-pc-mezzanine
  arm64: dts: rockchip: add reg property to brcmf sub-nodes
  arm64: dts: rockchip: fix dwmmc clock name for rk3308
  arm64: dts: rockchip: fix dwmmc clock name for px30

Link: https://lore.kernel.org/r/7641353.lIegmeFAIi@phil
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2020-01-19 22:47:46 -08:00
commit 71acc94c49
13 changed files with 85 additions and 23 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

32
arch/arm64/boot/dts/rockchip/px30-evb.dts
View file

@ -112,6 +112,38 @@ &display_subsystem {
status = "okay";
};
&dsi {
status = "okay";
ports {
mipi_out: port@1 {
reg = <1>;
mipi_out_panel: endpoint {
remote-endpoint = <&mipi_in_panel>;
};
};
};
panel@0 {
compatible = "xinpeng,xpp055c272";
reg = <0>;
backlight = <&backlight>;
iovcc-supply = <&vcc_1v8>;
vci-supply = <&vcc3v3_lcd>;
port {
mipi_in_panel: endpoint {
remote-endpoint = <&mipi_out_panel>;
};
};
};
};
&dsi_dphy {
status = "okay";
};
&emmc {
bus-width = <8>;
cap-mmc-highspeed;

12
arch/arm64/boot/dts/rockchip/px30.dtsi
View file

@ -924,13 +924,13 @@ gmac: ethernet@ff360000 {
status = "disabled";
};
sdmmc: dwmmc@ff370000 {
sdmmc: mmc@ff370000 {
compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff370000 0x0 0x4000>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
pinctrl-names = "default";
@ -939,13 +939,13 @@ sdmmc: dwmmc@ff370000 {
status = "disabled";
};
sdio: dwmmc@ff380000 {
sdio: mmc@ff380000 {
compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff380000 0x0 0x4000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
pinctrl-names = "default";
@ -954,13 +954,13 @@ sdio: dwmmc@ff380000 {
status = "disabled";
};
emmc: dwmmc@ff390000 {
emmc: mmc@ff390000 {
compatible = "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff390000 0x0 0x4000>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
pinctrl-names = "default";

12
arch/arm64/boot/dts/rockchip/rk3308.dtsi
View file

@ -584,14 +584,14 @@ spdif_tx: spdif-tx@ff3a0000 {
status = "disabled";
};
sdmmc: dwmmc@ff480000 {
sdmmc: mmc@ff480000 {
compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff480000 0x0 0x4000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
bus-width = <4>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
pinctrl-names = "default";
@ -599,27 +599,27 @@ sdmmc: dwmmc@ff480000 {
status = "disabled";
};
emmc: dwmmc@ff490000 {
emmc: mmc@ff490000 {
compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff490000 0x0 0x4000>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
bus-width = <8>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
status = "disabled";
};
sdio: dwmmc@ff4a0000 {
sdio: mmc@ff4a0000 {
compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff4a0000 0x0 0x4000>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
bus-width = <4>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
max-frequency = <150000000>;
pinctrl-names = "default";

6
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View file

@ -854,7 +854,7 @@ u2phy_host: host-port {
};
};
sdmmc: dwmmc@ff500000 {
sdmmc: mmc@ff500000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff500000 0x0 0x4000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
@ -866,7 +866,7 @@ sdmmc: dwmmc@ff500000 {
status = "disabled";
};
sdio: dwmmc@ff510000 {
sdio: mmc@ff510000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff510000 0x0 0x4000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
@ -878,7 +878,7 @@ sdio: dwmmc@ff510000 {
status = "disabled";
};
emmc: dwmmc@ff520000 {
emmc: mmc@ff520000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff520000 0x0 0x4000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

6
arch/arm64/boot/dts/rockchip/rk3368.dtsi
View file

@ -204,7 +204,7 @@ xin24m: oscillator {
#clock-cells = <0>;
};
sdmmc: dwmmc@ff0c0000 {
sdmmc: mmc@ff0c0000 {
compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff0c0000 0x0 0x4000>;
max-frequency = <150000000>;
@ -218,7 +218,7 @@ sdmmc: dwmmc@ff0c0000 {
status = "disabled";
};
sdio0: dwmmc@ff0d0000 {
sdio0: mmc@ff0d0000 {
compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff0d0000 0x0 0x4000>;
max-frequency = <150000000>;
@ -232,7 +232,7 @@ sdio0: dwmmc@ff0d0000 {
status = "disabled";
};
emmc: dwmmc@ff0f0000 {
emmc: mmc@ff0f0000 {
compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff0f0000 0x0 0x4000>;
max-frequency = <150000000>;

3
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
View file

@ -668,9 +668,12 @@ &sdio0 {
vqmmc-supply = &vcc1v8_s3; /* IO line */
vmmc-supply = &vcc_sdio; /* card's power */
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;

2
arch/arm64/boot/dts/rockchip/rk3399-gru-bob.dts
View file

@ -18,7 +18,7 @@ / {
"google,bob", "google,gru", "rockchip,rk3399";
edp_panel: edp-panel {
compatible = "boe,nv101wxmn51", "simple-panel";
compatible = "boe,nv101wxmn51";
backlight = <&backlight>;
power-supply = <&pp3300_disp>;

2
arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts
View file

@ -39,7 +39,7 @@ p3_3v_dig: p3-3v-dig {
};
edp_panel: edp-panel {
compatible = "sharp,lq123p1jx31", "simple-panel";
compatible = "sharp,lq123p1jx31";
backlight = <&backlight>;
power-supply = <&pp3300_disp>;

3
arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
View file

@ -654,9 +654,12 @@ &sdio0 {
sd-uhs-sdr104;
vqmmc-supply = <&vcc1v8_s3>;
vmmc-supply = <&vccio_sd>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;

3
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
View file

@ -648,9 +648,12 @@ &sdio0 {
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
sd-uhs-sdr104;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;

21
arch/arm64/boot/dts/rockchip/rk3399-roc-pc-mezzanine.dts
View file

@ -70,3 +70,24 @@ pcie_perst: pcie-perst {
};
};
};
&sdio0 {
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_ngff>;
vqmmc-supply = <&vcc_1v8>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
status = "okay";
};

2
arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts
View file

@ -84,7 +84,7 @@ backlight: backlight {
};
edp_panel: edp-panel {
compatible ="lg,lp079qx1-sp0v", "simple-panel";
compatible ="lg,lp079qx1-sp0v";
backlight = <&backlight>;
enable-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";

4
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View file

@ -291,7 +291,7 @@ gmac: ethernet@fe300000 {
status = "disabled";
};
sdio0: dwmmc@fe310000 {
sdio0: mmc@fe310000 {
compatible = "rockchip,rk3399-dw-mshc",
"rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe310000 0x0 0x4000>;
@ -307,7 +307,7 @@ sdio0: dwmmc@fe310000 {
status = "disabled";
};
sdmmc: dwmmc@fe320000 {
sdmmc: mmc@fe320000 {
compatible = "rockchip,rk3399-dw-mshc",
"rockchip,rk3288-dw-mshc";
reg = <0x0 0xfe320000 0x0 0x4000>;