mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 09:19:51 +00:00
drm/i915: Consolidate flushing the display plane
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
parent
b3b079dbef
commit
7213342db5
4 changed files with 17 additions and 50 deletions
|
@ -1024,7 +1024,6 @@ void i915_gem_free_all_phys_object(struct drm_device *dev);
|
||||||
int i915_gem_object_get_pages(struct drm_gem_object *obj, gfp_t gfpmask);
|
int i915_gem_object_get_pages(struct drm_gem_object *obj, gfp_t gfpmask);
|
||||||
void i915_gem_object_put_pages(struct drm_gem_object *obj);
|
void i915_gem_object_put_pages(struct drm_gem_object *obj);
|
||||||
void i915_gem_release(struct drm_device * dev, struct drm_file *file_priv);
|
void i915_gem_release(struct drm_device * dev, struct drm_file *file_priv);
|
||||||
int i915_gem_object_flush_write_domain(struct drm_gem_object *obj);
|
|
||||||
|
|
||||||
void i915_gem_shrinker_init(void);
|
void i915_gem_shrinker_init(void);
|
||||||
void i915_gem_shrinker_exit(void);
|
void i915_gem_shrinker_exit(void);
|
||||||
|
|
|
@ -2645,26 +2645,6 @@ i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj)
|
||||||
old_write_domain);
|
old_write_domain);
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
|
||||||
i915_gem_object_flush_write_domain(struct drm_gem_object *obj)
|
|
||||||
{
|
|
||||||
int ret = 0;
|
|
||||||
|
|
||||||
switch (obj->write_domain) {
|
|
||||||
case I915_GEM_DOMAIN_GTT:
|
|
||||||
i915_gem_object_flush_gtt_write_domain(obj);
|
|
||||||
break;
|
|
||||||
case I915_GEM_DOMAIN_CPU:
|
|
||||||
i915_gem_object_flush_cpu_write_domain(obj);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
ret = i915_gem_object_flush_gpu_write_domain(obj, true);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Moves a single object to the GTT read, and possibly write domain.
|
* Moves a single object to the GTT read, and possibly write domain.
|
||||||
*
|
*
|
||||||
|
@ -2686,21 +2666,16 @@ i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write)
|
||||||
if (ret != 0)
|
if (ret != 0)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
old_write_domain = obj->write_domain;
|
i915_gem_object_flush_cpu_write_domain(obj);
|
||||||
old_read_domains = obj->read_domains;
|
|
||||||
|
|
||||||
/* If we're writing through the GTT domain, then CPU and GPU caches
|
|
||||||
* will need to be invalidated at next use.
|
|
||||||
*/
|
|
||||||
if (write) {
|
if (write) {
|
||||||
ret = i915_gem_object_wait_rendering(obj);
|
ret = i915_gem_object_wait_rendering(obj);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
obj->read_domains &= I915_GEM_DOMAIN_GTT;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
i915_gem_object_flush_cpu_write_domain(obj);
|
old_write_domain = obj->write_domain;
|
||||||
|
old_read_domains = obj->read_domains;
|
||||||
|
|
||||||
/* It should now be out of any other write domains, and we can update
|
/* It should now be out of any other write domains, and we can update
|
||||||
* the domain values for our changes.
|
* the domain values for our changes.
|
||||||
|
@ -2708,6 +2683,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write)
|
||||||
BUG_ON((obj->write_domain & ~I915_GEM_DOMAIN_GTT) != 0);
|
BUG_ON((obj->write_domain & ~I915_GEM_DOMAIN_GTT) != 0);
|
||||||
obj->read_domains |= I915_GEM_DOMAIN_GTT;
|
obj->read_domains |= I915_GEM_DOMAIN_GTT;
|
||||||
if (write) {
|
if (write) {
|
||||||
|
obj->read_domains = I915_GEM_DOMAIN_GTT;
|
||||||
obj->write_domain = I915_GEM_DOMAIN_GTT;
|
obj->write_domain = I915_GEM_DOMAIN_GTT;
|
||||||
obj_priv->dirty = 1;
|
obj_priv->dirty = 1;
|
||||||
}
|
}
|
||||||
|
@ -2773,6 +2749,12 @@ i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write)
|
||||||
*/
|
*/
|
||||||
i915_gem_object_set_to_full_cpu_read_domain(obj);
|
i915_gem_object_set_to_full_cpu_read_domain(obj);
|
||||||
|
|
||||||
|
if (write) {
|
||||||
|
ret = i915_gem_object_wait_rendering(obj);
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
old_write_domain = obj->write_domain;
|
old_write_domain = obj->write_domain;
|
||||||
old_read_domains = obj->read_domains;
|
old_read_domains = obj->read_domains;
|
||||||
|
|
||||||
|
@ -2792,10 +2774,6 @@ i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj, int write)
|
||||||
* need to be invalidated at next use.
|
* need to be invalidated at next use.
|
||||||
*/
|
*/
|
||||||
if (write) {
|
if (write) {
|
||||||
ret = i915_gem_object_wait_rendering(obj);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
obj->read_domains &= I915_GEM_DOMAIN_CPU;
|
obj->read_domains &= I915_GEM_DOMAIN_CPU;
|
||||||
obj->write_domain = I915_GEM_DOMAIN_CPU;
|
obj->write_domain = I915_GEM_DOMAIN_CPU;
|
||||||
}
|
}
|
||||||
|
|
|
@ -1448,6 +1448,12 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj)
|
||||||
if (ret != 0)
|
if (ret != 0)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
ret = i915_gem_object_set_to_display_plane(obj);
|
||||||
|
if (ret != 0) {
|
||||||
|
i915_gem_object_unpin(obj);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
/* Install a fence for tiled scan-out. Pre-i965 always needs a
|
/* Install a fence for tiled scan-out. Pre-i965 always needs a
|
||||||
* fence, whereas 965+ only requires a fence if using
|
* fence, whereas 965+ only requires a fence if using
|
||||||
* framebuffer compression. For simplicity, we always install
|
* framebuffer compression. For simplicity, we always install
|
||||||
|
@ -1589,13 +1595,6 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = i915_gem_object_set_to_display_plane(obj);
|
|
||||||
if (ret != 0) {
|
|
||||||
i915_gem_object_unpin(obj);
|
|
||||||
mutex_unlock(&dev->struct_mutex);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
ret = intel_pipe_set_base_atomic(crtc, crtc->fb, x, y);
|
ret = intel_pipe_set_base_atomic(crtc, crtc->fb, x, y);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
i915_gem_object_unpin(obj);
|
i915_gem_object_unpin(obj);
|
||||||
|
@ -5043,9 +5042,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
|
||||||
drm_gem_object_reference(obj);
|
drm_gem_object_reference(obj);
|
||||||
|
|
||||||
crtc->fb = fb;
|
crtc->fb = fb;
|
||||||
ret = i915_gem_object_flush_write_domain(obj);
|
|
||||||
if (ret)
|
|
||||||
goto cleanup_objs;
|
|
||||||
|
|
||||||
ret = drm_vblank_get(dev, intel_crtc->pipe);
|
ret = drm_vblank_get(dev, intel_crtc->pipe);
|
||||||
if (ret)
|
if (ret)
|
||||||
|
|
|
@ -93,19 +93,13 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
|
||||||
|
|
||||||
mutex_lock(&dev->struct_mutex);
|
mutex_lock(&dev->struct_mutex);
|
||||||
|
|
||||||
|
/* Flush everything out, we'll be doing GTT only from now on */
|
||||||
ret = intel_pin_and_fence_fb_obj(dev, fbo);
|
ret = intel_pin_and_fence_fb_obj(dev, fbo);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
DRM_ERROR("failed to pin fb: %d\n", ret);
|
DRM_ERROR("failed to pin fb: %d\n", ret);
|
||||||
goto out_unref;
|
goto out_unref;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Flush everything out, we'll be doing GTT only from now on */
|
|
||||||
ret = i915_gem_object_set_to_gtt_domain(fbo, 1);
|
|
||||||
if (ret) {
|
|
||||||
DRM_ERROR("failed to bind fb: %d.\n", ret);
|
|
||||||
goto out_unpin;
|
|
||||||
}
|
|
||||||
|
|
||||||
info = framebuffer_alloc(0, device);
|
info = framebuffer_alloc(0, device);
|
||||||
if (!info) {
|
if (!info) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
Loading…
Reference in a new issue