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MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup.

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Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8943/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
David Daney 2015-01-15 16:11:15 +03:00 committed by Ralf Baechle
parent debe6a623d
commit 726da2f82a
2 changed files with 17 additions and 6 deletions
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4
arch/mips/cavium-octeon/setup.c
View file

@ -579,12 +579,10 @@ void octeon_user_io_init(void)
/* R/W If set, CVMSEG is available for loads/stores in user
* mode. */
cvmmemctl.s.cvmsegenau = 0;
/* R/W Size of local memory in cache blocks, 54 (6912 bytes)
* is max legal value. */
cvmmemctl.s.lmemsz = CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE;
write_c0_cvmmemctl(cvmmemctl.u64);
/* Setup of CVMSEG is done in kernel-entry-init.h */
if (smp_processor_id() == 0)
pr_notice("CVMSEG size: %d cache lines (%d bytes)\n",
CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE,

19
arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
View file

@ -8,11 +8,10 @@
#ifndef __ASM_MACH_CAVIUM_OCTEON_KERNEL_ENTRY_H
#define __ASM_MACH_CAVIUM_OCTEON_KERNEL_ENTRY_H
#define CP0_CYCLE_COUNTER $9, 6
#define CP0_CVMCTL_REG $9, 7
#define CP0_CVMMEMCTL_REG $11,7
#define CP0_PRID_REG $15, 0
#define CP0_DCACHE_ERR_REG $27, 1
#define CP0_PRID_OCTEON_PASS1 0x000d0000
#define CP0_PRID_OCTEON_CN30XX 0x000d0200
@ -60,7 +59,7 @@
skip:
# First clear off CvmCtl[IPPCI] bit and move the performance
# counters interrupt to IRQ 6
li v1, ~(7 << 7)
dli v1, ~(7 << 7)
and v0, v0, v1
ori v0, v0, (6 << 7)
@ -90,6 +89,20 @@
sync
# Flush dcache after config change
cache 9, 0($0)
# Zero all of CVMSEG to make sure parity is correct
dli v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE
dsll v0, 7
beqz v0, 2f
1: dsubu v0, 8
sd $0, -32768(v0)
bnez v0, 1b
2:
mfc0 v0, CP0_PRID_REG
bbit0 v0, 15, 1f
# OCTEON II or better have bit 15 set. Clear the error bits.
dli v0, 0x27
dmtc0 v0, CP0_DCACHE_ERR_REG
1:
# Get my core id
rdhwr v0, $0
# Jump the master to kernel_entry