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ALSA: hda - clean up code to reset hda link
This patch is a cleanup to the previous patch "reset hda link during system/ runtime suspend". In this patch - azx_enter_link_reset() and azx_exit_link_reset() are defined for entering and exiting the link reset respectively. azx_link_reset() is no longer used and replaced by azx_enter_link_reset(). - azx_reset() reuses the above two new functions for a link reset cycle Signed-off-by: Mengdong Lin <mengdong.lin@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
parent
8b2c7a5c40
commit
7295b26438
1 changed files with 18 additions and 17 deletions
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@ -1121,7 +1121,7 @@ static void azx_load_dsp_cleanup(struct hda_bus *bus,
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#endif
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#endif
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/* enter link reset */
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/* enter link reset */
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static void azx_reset_link(struct azx *chip)
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static void azx_enter_link_reset(struct azx *chip)
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{
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{
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unsigned long timeout;
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unsigned long timeout;
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@ -1134,11 +1134,22 @@ static void azx_reset_link(struct azx *chip)
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usleep_range(500, 1000);
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usleep_range(500, 1000);
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}
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}
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/* reset codec link */
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/* exit link reset */
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static int azx_reset(struct azx *chip, int full_reset)
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static void azx_exit_link_reset(struct azx *chip)
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{
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{
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unsigned long timeout;
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unsigned long timeout;
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azx_writeb(chip, GCTL, azx_readb(chip, GCTL) | ICH6_GCTL_RESET);
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timeout = jiffies + msecs_to_jiffies(100);
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while (!azx_readb(chip, GCTL) &&
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time_before(jiffies, timeout))
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usleep_range(500, 1000);
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}
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/* reset codec link */
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static int azx_reset(struct azx *chip, int full_reset)
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{
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if (!full_reset)
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if (!full_reset)
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goto __skip;
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goto __skip;
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@ -1146,12 +1157,7 @@ static int azx_reset(struct azx *chip, int full_reset)
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azx_writeb(chip, STATESTS, STATESTS_INT_MASK);
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azx_writeb(chip, STATESTS, STATESTS_INT_MASK);
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/* reset controller */
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/* reset controller */
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azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~ICH6_GCTL_RESET);
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azx_enter_link_reset(chip);
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timeout = jiffies + msecs_to_jiffies(100);
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while (azx_readb(chip, GCTL) &&
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time_before(jiffies, timeout))
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usleep_range(500, 1000);
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/* delay for >= 100us for codec PLL to settle per spec
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/* delay for >= 100us for codec PLL to settle per spec
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* Rev 0.9 section 5.5.1
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* Rev 0.9 section 5.5.1
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@ -1159,12 +1165,7 @@ static int azx_reset(struct azx *chip, int full_reset)
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usleep_range(500, 1000);
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usleep_range(500, 1000);
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/* Bring controller out of reset */
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/* Bring controller out of reset */
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azx_writeb(chip, GCTL, azx_readb(chip, GCTL) | ICH6_GCTL_RESET);
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azx_exit_link_reset(chip);
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timeout = jiffies + msecs_to_jiffies(100);
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while (!azx_readb(chip, GCTL) &&
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time_before(jiffies, timeout))
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usleep_range(500, 1000);
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/* Brent Chartrand said to wait >= 540us for codecs to initialize */
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/* Brent Chartrand said to wait >= 540us for codecs to initialize */
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usleep_range(1000, 1200);
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usleep_range(1000, 1200);
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@ -2908,7 +2909,7 @@ static int azx_suspend(struct device *dev)
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if (chip->initialized)
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if (chip->initialized)
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snd_hda_suspend(chip->bus);
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snd_hda_suspend(chip->bus);
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azx_stop_chip(chip);
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azx_stop_chip(chip);
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azx_reset_link(chip);
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azx_enter_link_reset(chip);
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if (chip->irq >= 0) {
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if (chip->irq >= 0) {
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free_irq(chip->irq, chip);
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free_irq(chip->irq, chip);
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chip->irq = -1;
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chip->irq = -1;
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@ -2961,7 +2962,7 @@ static int azx_runtime_suspend(struct device *dev)
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struct azx *chip = card->private_data;
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struct azx *chip = card->private_data;
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azx_stop_chip(chip);
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azx_stop_chip(chip);
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azx_reset_link(chip);
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azx_enter_link_reset(chip);
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azx_clear_irq_pending(chip);
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azx_clear_irq_pending(chip);
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return 0;
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return 0;
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}
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}
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