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drm/i915/audio: Fix audio time stamp programming for DP
commitc66b835627
upstream. Intel hardware is capable of programming the Maud/Naud SDPs on its own based on real-time clocks. While doing so, it takes care of any deviations from the theoretical values. Programming the registers explicitly with static values can interfere with this logic. Therefore, let the HW decide the Maud and Naud SDPs on it's own. Cc: stable@vger.kernel.org # v5.17 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8097 Co-developed-by: Kai Vehmanen <kai.vehmanen@intel.com> Signed-off-by: Kai Vehmanen <kai.vehmanen@intel.com> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240430091825.733499-1-chaitanya.kumar.borah@intel.com (cherry picked from commit8e056b50d9
) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 8 additions and 105 deletions
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@ -76,19 +76,6 @@ struct intel_audio_funcs {
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struct intel_crtc_state *crtc_state);
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struct intel_crtc_state *crtc_state);
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};
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};
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/* DP N/M table */
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#define LC_810M 810000
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#define LC_540M 540000
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#define LC_270M 270000
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#define LC_162M 162000
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struct dp_aud_n_m {
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int sample_rate;
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int clock;
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u16 m;
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u16 n;
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};
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struct hdmi_aud_ncts {
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struct hdmi_aud_ncts {
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int sample_rate;
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int sample_rate;
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int clock;
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int clock;
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@ -96,60 +83,6 @@ struct hdmi_aud_ncts {
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int cts;
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int cts;
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};
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};
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/* Values according to DP 1.4 Table 2-104 */
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static const struct dp_aud_n_m dp_aud_n_m[] = {
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{ 32000, LC_162M, 1024, 10125 },
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{ 44100, LC_162M, 784, 5625 },
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{ 48000, LC_162M, 512, 3375 },
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{ 64000, LC_162M, 2048, 10125 },
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{ 88200, LC_162M, 1568, 5625 },
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{ 96000, LC_162M, 1024, 3375 },
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{ 128000, LC_162M, 4096, 10125 },
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{ 176400, LC_162M, 3136, 5625 },
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{ 192000, LC_162M, 2048, 3375 },
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{ 32000, LC_270M, 1024, 16875 },
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{ 44100, LC_270M, 784, 9375 },
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{ 48000, LC_270M, 512, 5625 },
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{ 64000, LC_270M, 2048, 16875 },
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{ 88200, LC_270M, 1568, 9375 },
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{ 96000, LC_270M, 1024, 5625 },
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{ 128000, LC_270M, 4096, 16875 },
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{ 176400, LC_270M, 3136, 9375 },
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{ 192000, LC_270M, 2048, 5625 },
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{ 32000, LC_540M, 1024, 33750 },
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{ 44100, LC_540M, 784, 18750 },
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{ 48000, LC_540M, 512, 11250 },
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{ 64000, LC_540M, 2048, 33750 },
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{ 88200, LC_540M, 1568, 18750 },
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{ 96000, LC_540M, 1024, 11250 },
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{ 128000, LC_540M, 4096, 33750 },
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{ 176400, LC_540M, 3136, 18750 },
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{ 192000, LC_540M, 2048, 11250 },
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{ 32000, LC_810M, 1024, 50625 },
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{ 44100, LC_810M, 784, 28125 },
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{ 48000, LC_810M, 512, 16875 },
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{ 64000, LC_810M, 2048, 50625 },
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{ 88200, LC_810M, 1568, 28125 },
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{ 96000, LC_810M, 1024, 16875 },
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{ 128000, LC_810M, 4096, 50625 },
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{ 176400, LC_810M, 3136, 28125 },
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{ 192000, LC_810M, 2048, 16875 },
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};
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static const struct dp_aud_n_m *
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audio_config_dp_get_n_m(const struct intel_crtc_state *crtc_state, int rate)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(dp_aud_n_m); i++) {
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if (rate == dp_aud_n_m[i].sample_rate &&
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crtc_state->port_clock == dp_aud_n_m[i].clock)
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return &dp_aud_n_m[i];
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}
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return NULL;
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}
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static const struct {
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static const struct {
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int clock;
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int clock;
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u32 config;
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u32 config;
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@ -387,47 +320,17 @@ hsw_dp_audio_config_update(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state)
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const struct intel_crtc_state *crtc_state)
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{
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{
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struct drm_i915_private *i915 = to_i915(encoder->base.dev);
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struct drm_i915_private *i915 = to_i915(encoder->base.dev);
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struct i915_audio_component *acomp = i915->display.audio.component;
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enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
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enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
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enum port port = encoder->port;
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const struct dp_aud_n_m *nm;
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int rate;
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u32 tmp;
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rate = acomp ? acomp->aud_sample_rate[port] : 0;
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/* Enable time stamps. Let HW calculate Maud/Naud values */
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nm = audio_config_dp_get_n_m(crtc_state, rate);
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intel_de_rmw(i915, HSW_AUD_CFG(cpu_transcoder),
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if (nm)
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AUD_CONFIG_N_VALUE_INDEX |
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drm_dbg_kms(&i915->drm, "using Maud %u, Naud %u\n", nm->m,
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AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK |
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nm->n);
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AUD_CONFIG_UPPER_N_MASK |
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else
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AUD_CONFIG_LOWER_N_MASK |
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drm_dbg_kms(&i915->drm, "using automatic Maud, Naud\n");
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AUD_CONFIG_N_PROG_ENABLE,
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AUD_CONFIG_N_VALUE_INDEX);
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tmp = intel_de_read(i915, HSW_AUD_CFG(cpu_transcoder));
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tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
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tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
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tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
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tmp |= AUD_CONFIG_N_VALUE_INDEX;
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if (nm) {
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tmp &= ~AUD_CONFIG_N_MASK;
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tmp |= AUD_CONFIG_N(nm->n);
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tmp |= AUD_CONFIG_N_PROG_ENABLE;
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}
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intel_de_write(i915, HSW_AUD_CFG(cpu_transcoder), tmp);
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tmp = intel_de_read(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder));
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tmp &= ~AUD_CONFIG_M_MASK;
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tmp &= ~AUD_M_CTS_M_VALUE_INDEX;
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tmp &= ~AUD_M_CTS_M_PROG_ENABLE;
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if (nm) {
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tmp |= nm->m;
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tmp |= AUD_M_CTS_M_VALUE_INDEX;
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tmp |= AUD_M_CTS_M_PROG_ENABLE;
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}
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intel_de_write(i915, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp);
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}
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}
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static void
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static void
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