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iio: temp: ltc2983: Fix alignment for DMA safety 

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: f110f3188e ("iio: temperature: Add support for LTC2983")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-91-jic23@kernel.org
This commit is contained in:
Jonathan Cameron 2022-05-08 18:57:10 +01:00
parent faa05ecb13
commit 732f2cb2fb
1 changed files with 2 additions and 2 deletions
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4
drivers/iio/temperature/ltc2983.c
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@ -204,11 +204,11 @@ struct ltc2983_data {
u8 num_channels;
u8 iio_channels;
/*
* DMA (thus cache coherency maintenance) requires the
* DMA (thus cache coherency maintenance) may require the
* transfer buffers to live in their own cache lines.
* Holds the converted temperature
*/
__be32 temp ____cacheline_aligned;
__be32 temp __aligned(IIO_DMA_MINALIGN);
};
struct ltc2983_sensor {