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powerpc/32: transfer can avoid saving r4/r5 over trace call
Now that handlers get all registers from pt_regs, r4 and r5 are no longer live here and may be clobbered. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210130130852.2952424-11-npiggin@gmail.com
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1 changed files with 1 additions and 6 deletions
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@ -276,8 +276,7 @@ reenable_mmu:
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* We save a bunch of GPRs,
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* r3 can be different from GPR3(r1) at this point, r9 and r11
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* contains the old MSR and handler address respectively,
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* r4 & r5 can contain page fault arguments that need to be passed
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* along as well. r0, r6-r8, r12, CCR, CTR, XER etc... are left
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* r0, r4-r8, r12, CCR, CTR, XER etc... are left
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* clobbered as they aren't useful past this point.
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*/
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@ -285,15 +284,11 @@ reenable_mmu:
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stw r9,8(r1)
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stw r11,12(r1)
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stw r3,16(r1)
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stw r4,20(r1)
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stw r5,24(r1)
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/* If we are disabling interrupts (normal case), simply log it with
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* lockdep
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*/
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1: bl trace_hardirqs_off
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lwz r5,24(r1)
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lwz r4,20(r1)
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lwz r3,16(r1)
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lwz r11,12(r1)
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lwz r9,8(r1)
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