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drm/i915/chv: Fix "drm/i915/chv: Add a bunch of pre production workarounds"
Correct a merge mishap in commit e4443e459c
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Wa*:chv belongs in cherryview_enable_rps, not gen8_enable_rps.
Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
parent
3b2cc8ab64
commit
7405f42c79
1 changed files with 6 additions and 6 deletions
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@ -3513,15 +3513,11 @@ static void gen8_enable_rps(struct drm_device *dev)
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I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
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/* WaDisablePwrmtrEvent:chv (pre-production hw) */
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I915_WRITE(0xA80C, I915_READ(0xA80C) & 0x00ffffff);
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I915_WRITE(0xA810, I915_READ(0xA810) & 0xffffff00);
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/* 5: Enable RPS */
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I915_WRITE(GEN6_RP_CONTROL,
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GEN6_RP_MEDIA_TURBO |
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GEN6_RP_MEDIA_HW_NORMAL_MODE |
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GEN6_RP_MEDIA_IS_GFX | /* WaSetMaskForGfxBusyness:chv (pre-production hw ?) */
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GEN6_RP_MEDIA_IS_GFX |
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GEN6_RP_ENABLE |
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GEN6_RP_UP_BUSY_AVG |
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GEN6_RP_DOWN_IDLE_AVG);
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@ -4015,10 +4011,14 @@ static void cherryview_enable_rps(struct drm_device *dev)
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I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
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/* WaDisablePwrmtrEvent:chv (pre-production hw) */
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I915_WRITE(0xA80C, I915_READ(0xA80C) & 0x00ffffff);
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I915_WRITE(0xA810, I915_READ(0xA810) & 0xffffff00);
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/* 5: Enable RPS */
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I915_WRITE(GEN6_RP_CONTROL,
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GEN6_RP_MEDIA_HW_NORMAL_MODE |
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GEN6_RP_MEDIA_IS_GFX |
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GEN6_RP_MEDIA_IS_GFX | /* WaSetMaskForGfxBusyness:chv (pre-production hw ?) */
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GEN6_RP_ENABLE |
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GEN6_RP_UP_BUSY_AVG |
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GEN6_RP_DOWN_IDLE_AVG);
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