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staging: r8187se: Change to use common eeprom routines in EEPROM_93CX
The TODO list includes switching this driver to use the common EEPROM routines in EEPROM_93CX. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Tested by: Bernhard Schiffner <bernhard@schiffner-limbach.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
parent
13a21ad18c
commit
742821ce5f
6 changed files with 60 additions and 172 deletions
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@ -3,6 +3,7 @@ config R8187SE
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depends on PCI && WLAN
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select WIRELESS_EXT
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select WEXT_PRIV
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select EEPROM_93CX6
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default N
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---help---
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If built as a module, it will be called r8187se.ko.
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@ -18,7 +18,6 @@ EXTRA_CFLAGS += -DENABLE_LPS
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r8187se-objs := \
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r8180_core.o \
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r8180_93cx6.o \
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r8180_wx.o \
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r8180_rtl8225z2.o \
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r8185b_init.o \
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@ -5,7 +5,6 @@ TODO:
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- switch to use shared "librtl" instead of private ieee80211 stack
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- switch to use LIB80211
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- switch to use MAC80211
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- switch to use EEPROM_93CX6
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- use kernel coding style
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- checkpatch.pl fixes
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- sparse fixes
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@ -1,146 +0,0 @@
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/*
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This files contains card eeprom (93c46 or 93c56) programming routines,
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memory is addressed by 16 bits words.
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This is part of rtl8180 OpenSource driver.
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Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
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Released under the terms of GPL (General Public Licence)
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Parts of this driver are based on the GPL part of the
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official realtek driver.
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Parts of this driver are based on the rtl8180 driver skeleton
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from Patric Schenke & Andres Salomon.
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Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
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We want to tanks the Authors of those projects and the Ndiswrapper
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project Authors.
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*/
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#include "r8180_93cx6.h"
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void eprom_cs(struct net_device *dev, short bit)
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{
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if(bit)
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write_nic_byte(dev, EPROM_CMD,
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(1<<EPROM_CS_SHIFT) | \
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read_nic_byte(dev, EPROM_CMD)); //enable EPROM
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else
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write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)\
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&~(1<<EPROM_CS_SHIFT)); //disable EPROM
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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}
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void eprom_ck_cycle(struct net_device *dev)
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{
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write_nic_byte(dev, EPROM_CMD,
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(1<<EPROM_CK_SHIFT) | read_nic_byte(dev,EPROM_CMD));
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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write_nic_byte(dev, EPROM_CMD,
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read_nic_byte(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT));
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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}
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void eprom_w(struct net_device *dev,short bit)
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{
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if(bit)
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write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
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read_nic_byte(dev,EPROM_CMD));
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else
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write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev,EPROM_CMD)\
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&~(1<<EPROM_W_SHIFT));
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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}
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short eprom_r(struct net_device *dev)
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{
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short bit;
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bit=(read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) );
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udelay(EPROM_DELAY);
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if(bit) return 1;
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return 0;
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}
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void eprom_send_bits_string(struct net_device *dev, short b[], int len)
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{
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int i;
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for(i=0; i<len; i++){
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eprom_w(dev, b[i]);
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eprom_ck_cycle(dev);
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}
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}
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u32 eprom_read(struct net_device *dev, u32 addr)
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{
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struct r8180_priv *priv = ieee80211_priv(dev);
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short read_cmd[]={1,1,0};
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short addr_str[8];
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int i;
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int addr_len;
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u32 ret;
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ret=0;
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//enable EPROM programming
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write_nic_byte(dev, EPROM_CMD,
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(EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT));
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force_pci_posting(dev);
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udelay(EPROM_DELAY);
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if (priv->epromtype==EPROM_93c56){
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addr_str[7]=addr & 1;
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addr_str[6]=addr & (1<<1);
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addr_str[5]=addr & (1<<2);
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addr_str[4]=addr & (1<<3);
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addr_str[3]=addr & (1<<4);
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addr_str[2]=addr & (1<<5);
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addr_str[1]=addr & (1<<6);
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addr_str[0]=addr & (1<<7);
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addr_len=8;
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}else{
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addr_str[5]=addr & 1;
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addr_str[4]=addr & (1<<1);
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addr_str[3]=addr & (1<<2);
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addr_str[2]=addr & (1<<3);
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addr_str[1]=addr & (1<<4);
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addr_str[0]=addr & (1<<5);
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addr_len=6;
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}
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eprom_cs(dev, 1);
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eprom_ck_cycle(dev);
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eprom_send_bits_string(dev, read_cmd, 3);
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eprom_send_bits_string(dev, addr_str, addr_len);
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//keep chip pin D to low state while reading.
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//I'm unsure if it is necessary, but anyway shouldn't hurt
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eprom_w(dev, 0);
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for(i=0;i<16;i++){
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//eeprom needs a clk cycle between writing opcode&adr
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//and reading data. (eeprom outs a dummy 0)
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eprom_ck_cycle(dev);
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ret |= (eprom_r(dev)<<(15-i));
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}
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eprom_cs(dev, 0);
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eprom_ck_cycle(dev);
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//disable EPROM programming
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write_nic_byte(dev, EPROM_CMD,
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(EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
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return ret;
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}
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@ -45,13 +45,10 @@
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#define EPROM_TXPW_OFDM_CH1_2 0x20
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//#define EPROM_TXPW_CH1_2 0x10
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#define EPROM_TXPW_CH1_2 0x30
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#define EPROM_TXPW_CH3_4 0x11
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#define EPROM_TXPW_CH5_6 0x12
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#define EPROM_TXPW_CH7_8 0x13
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#define EPROM_TXPW_CH9_10 0x14
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#define EPROM_TXPW_CH11_12 0x15
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#define EPROM_TXPW_CH13_14 0x16
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#define EPROM_TXPW_CH1_2 0x30
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#define RTL818X_EEPROM_CMD_READ (1 << 0)
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#define RTL818X_EEPROM_CMD_WRITE (1 << 1)
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#define RTL818X_EEPROM_CMD_CK (1 << 2)
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#define RTL818X_EEPROM_CMD_CS (1 << 3)
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u32 eprom_read(struct net_device *dev,u32 addr); //reads a 16 bits word
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@ -31,6 +31,7 @@
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#undef DUMMY_RX
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#include <linux/syscalls.h>
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#include <linux/eeprom_93cx6.h>
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#include "r8180_hw.h"
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#include "r8180.h"
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@ -2642,6 +2643,36 @@ static void rtl8180_link_detect_init(plink_detect_t plink_detect)
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}
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//YJ,add,080828,end
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static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
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{
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struct net_device *dev = eeprom->data;
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u8 reg = read_nic_byte(dev, EPROM_CMD);
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eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
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eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
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eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
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eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
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}
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static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
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{
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struct net_device *dev = eeprom->data;
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u8 reg = 2 << 6;
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if (eeprom->reg_data_in)
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reg |= RTL818X_EEPROM_CMD_WRITE;
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if (eeprom->reg_data_out)
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reg |= RTL818X_EEPROM_CMD_READ;
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if (eeprom->reg_data_clock)
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reg |= RTL818X_EEPROM_CMD_CK;
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if (eeprom->reg_chip_select)
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reg |= RTL818X_EEPROM_CMD_CS;
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write_nic_byte(dev, EPROM_CMD, reg);
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read_nic_byte(dev, EPROM_CMD);
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udelay(10);
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}
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short rtl8180_init(struct net_device *dev)
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{
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struct r8180_priv *priv = ieee80211_priv(dev);
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u32 usValue;
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u16 tmpu16;
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int i, j;
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struct eeprom_93cx6 eeprom;
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u16 eeprom_val;
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priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF;
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eeprom.data = dev;
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eeprom.register_read = rtl8187se_eeprom_register_read;
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eeprom.register_write = rtl8187se_eeprom_register_write;
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eeprom.width = PCI_EEPROM_WIDTH_93C46;
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eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
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priv->channel_plan = eeprom_val & 0xFF;
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if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
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printk("rtl8180_init:Error channel plan! Set to default.\n");
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priv->channel_plan = 0;
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// just for sync 85
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priv->enable_gpio0 = 0;
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usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET);
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eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &eeprom_val);
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usValue = eeprom_val;
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DMESG("usValue is 0x%x\n",usValue);
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//3Read AntennaDiversity
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else
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priv->epromtype=EPROM_93c46;
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dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
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dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
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dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
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dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
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dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
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dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8;
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eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
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dev->dev_addr, 3);
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for(i=1,j=0; i<14; i+=2,j++){
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word = eprom_read(dev,EPROM_TXPW_CH1_2 + j);
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eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
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priv->chtxpwr[i]=word & 0xff;
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priv->chtxpwr[i+1]=(word & 0xff00)>>8;
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}
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for (i = 1, j = 0; i < 14; i += 2, j++) {
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word = eprom_read(dev, EPROM_TXPW_OFDM_CH1_2 + j);
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eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
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priv->chtxpwr_ofdm[i] = word & 0xff;
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priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
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}
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/* 3Read crystal calibtration and thermal meter indication on 87SE. */
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eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
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tmpu16 = eprom_read(dev, EEPROM_RSV >> 1);
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/* Crystal calibration for Xin and Xout resp. */
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priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
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priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
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if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
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priv->bTxPowerTrack = true;
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word = eprom_read(dev,EPROM_TXPW_BASE);
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eeprom_93cx6_read(&eeprom, EPROM_TXPW_BASE, &word);
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priv->cck_txpwr_base = word & 0xf;
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priv->ofdm_txpwr_base = (word>>4) & 0xf;
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version = eprom_read(dev,EPROM_VERSION);
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eeprom_93cx6_read(&eeprom, EPROM_VERSION, &version);
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DMESG("EEPROM version %x",version);
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priv->rcr_csense = 3;
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priv->cs_treshold = (eprom_read(dev, ENERGY_TRESHOLD) & 0xff00) >> 8;
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eeprom_93cx6_read(&eeprom, ENERGY_TRESHOLD, &eeprom_val);
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priv->cs_treshold = (eeprom_val & 0xff00) >> 8;
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priv->rf_chip = 0xff & eprom_read(dev, RFCHIPID);
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eeprom_93cx6_read(&eeprom, RFCHIPID, &eeprom_val);
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priv->rf_chip = 0xff & eeprom_val;
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priv->rf_chip = RF_ZEBRA4;
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priv->rf_sleep = rtl8225z4_rf_sleep;
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