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mips: dts: ingenic: Remove unnecessary AIC clocks 

The "ext" and "pll half" clocks don't belong in the DT. They are
not consumed directly by the AIC and are only used as the parent
clocks of the "i2s" clock. An operating system should be able to
figure out that information itself because it presumably knows the
layout of the clock tree.

Removing these from the DT should be safe from a compatibility
point of view because the jz4740-i2s driver in Linux does not, and
never did depend on them.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/all/20221028103418.17578-1-aidanmacdonald.0x0@gmail.com/
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Aidan MacDonald 2023-05-05 15:24:00 +01:00 committed by Thomas Bogendoerfer
parent 44c026a73b
commit 745b7908ec
3 changed files with 6 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
arch/mips/boot/dts/ingenic/jz4725b.dtsi
View File

@ -198,11 +198,8 @@
#sound-dai-cells = <0>;
clocks = <&cgu JZ4725B_CLK_AIC>,
<&cgu JZ4725B_CLK_I2S>,
<&cgu JZ4725B_CLK_EXT>,
<&cgu JZ4725B_CLK_PLL_HALF>;
clock-names = "aic", "i2s", "ext", "pll half";
clocks = <&cgu JZ4725B_CLK_AIC>, <&cgu JZ4725B_CLK_I2S>;
clock-names = "aic", "i2s";
interrupt-parent = <&intc>;
interrupts = <10>;

7
arch/mips/boot/dts/ingenic/jz4740.dtsi
View File

@ -192,11 +192,8 @@
interrupt-parent = <&intc>;
interrupts = <18>;
clocks = <&cgu JZ4740_CLK_AIC>,
<&cgu JZ4740_CLK_I2S>,
<&cgu JZ4740_CLK_EXT>,
<&cgu JZ4740_CLK_PLL_HALF>;
clock-names = "aic", "i2s", "ext", "pll half";
clocks = <&cgu JZ4740_CLK_AIC>, <&cgu JZ4740_CLK_I2S>;
clock-names = "aic", "i2s";
dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
dma-names = "rx", "tx";

5
arch/mips/boot/dts/ingenic/jz4770.dtsi
View File

@ -238,9 +238,8 @@
#sound-dai-cells = <0>;
clocks = <&cgu JZ4770_CLK_AIC>, <&cgu JZ4770_CLK_I2S>,
<&cgu JZ4770_CLK_EXT>, <&cgu JZ4770_CLK_PLL0>;
clock-names = "aic", "i2s", "ext", "pll half";
clocks = <&cgu JZ4770_CLK_AIC>, <&cgu JZ4770_CLK_I2S>;
clock-names = "aic", "i2s";
interrupt-parent = <&intc>;
interrupts = <34>;