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x86, microcode, amd: Early microcode patch loading support for AMD
Add early microcode patch loading support for AMD. Signed-off-by: Jacob Shin <jacob.shin@amd.com> Link: http://lkml.kernel.org/r/1369940959-2077-5-git-send-email-jacob.shin@amd.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com>
This commit is contained in:
parent
a76096a657
commit
757885e94a
7 changed files with 310 additions and 17 deletions
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@ -11,7 +11,8 @@ file and loaded to CPUs during boot time.
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The format of the combined initrd image is microcode in cpio format followed by
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the initrd image (maybe compressed). Kernel parses the combined initrd image
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during boot time. The microcode file in cpio name space is:
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kernel/x86/microcode/GenuineIntel.bin
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on Intel: kernel/x86/microcode/GenuineIntel.bin
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on AMD : kernel/x86/microcode/AuthenticAMD.bin
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During BSP boot (before SMP starts), if the kernel finds the microcode file in
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the initrd file, it parses the microcode and saves matching microcode in memory.
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@ -34,10 +35,8 @@ original initrd image /boot/initrd-3.5.0.img.
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mkdir initrd
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cd initrd
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mkdir kernel
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mkdir kernel/x86
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mkdir kernel/x86/microcode
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cp ../microcode.bin kernel/x86/microcode/GenuineIntel.bin
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find .|cpio -oc >../ucode.cpio
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mkdir -p kernel/x86/microcode
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cp ../microcode.bin kernel/x86/microcode/GenuineIntel.bin (or AuthenticAMD.bin)
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find . | cpio -o -H newc >../ucode.cpio
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cd ..
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cat ucode.cpio /boot/initrd-3.5.0.img >/boot/initrd-3.5.0.ucode.img
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@ -1058,8 +1058,16 @@ config MICROCODE_INTEL_LIB
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depends on MICROCODE_INTEL
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config MICROCODE_INTEL_EARLY
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def_bool n
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config MICROCODE_AMD_EARLY
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def_bool n
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config MICROCODE_EARLY
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bool "Early load microcode"
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depends on MICROCODE_INTEL && BLK_DEV_INITRD
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depends on (MICROCODE_INTEL || MICROCODE_AMD) && BLK_DEV_INITRD
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select MICROCODE_INTEL_EARLY if MICROCODE_INTEL
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select MICROCODE_AMD_EARLY if MICROCODE_AMD
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default y
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help
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This option provides functionality to read additional microcode data
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@ -1067,10 +1075,6 @@ config MICROCODE_INTEL_EARLY
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microcode to CPU's as early as possible. No functional change if no
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microcode data is glued to the initrd, therefore it's safe to say Y.
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config MICROCODE_EARLY
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def_bool y
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depends on MICROCODE_INTEL_EARLY
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config X86_MSR
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tristate "/dev/cpu/*/msr - Model-specific register support"
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---help---
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@ -61,4 +61,18 @@ extern int __apply_microcode_amd(struct microcode_amd *mc_amd);
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extern int apply_microcode_amd(int cpu);
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extern enum ucode_state load_microcode_amd(int cpu, const u8 *data, size_t size);
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#ifdef CONFIG_MICROCODE_AMD_EARLY
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#ifdef CONFIG_X86_32
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#define MPB_MAX_SIZE PAGE_SIZE
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extern u8 __cpuinitdata amd_bsp_mpb[MPB_MAX_SIZE];
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#endif
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extern void __init load_ucode_amd_bsp(void);
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extern void __cpuinit load_ucode_amd_ap(void);
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extern int __init save_microcode_in_initrd_amd(void);
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#else
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static inline void __init load_ucode_amd_bsp(void) {}
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static inline void __cpuinit load_ucode_amd_ap(void) {}
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static inline int __init save_microcode_in_initrd_amd(void) { return -EINVAL; }
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#endif
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#endif /* _ASM_X86_MICROCODE_AMD_H */
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@ -93,6 +93,7 @@ obj-$(CONFIG_MICROCODE_INTEL_LIB) += microcode_intel_lib.o
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microcode-y := microcode_core.o
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microcode-$(CONFIG_MICROCODE_INTEL) += microcode_intel.o
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microcode-$(CONFIG_MICROCODE_AMD) += microcode_amd.o
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obj-$(CONFIG_MICROCODE_AMD_EARLY) += microcode_amd_early.o
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obj-$(CONFIG_MICROCODE) += microcode.o
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obj-$(CONFIG_X86_CHECK_BIOS_CORRUPTION) += check.o
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@ -126,9 +126,20 @@ static struct ucode_patch *find_patch(unsigned int cpu)
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static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
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{
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struct cpuinfo_x86 *c = &cpu_data(cpu);
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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struct ucode_patch *p;
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csig->sig = cpuid_eax(0x00000001);
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csig->rev = c->microcode;
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/*
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* a patch could have been loaded early, set uci->mc so that
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* mc_bp_resume() can call apply_microcode()
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*/
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p = find_patch(cpu);
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if (p && (p->patch_id == csig->rev))
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uci->mc = p->data;
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pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
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return 0;
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@ -373,6 +384,17 @@ enum ucode_state load_microcode_amd(int cpu, const u8 *data, size_t size)
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if (ret != UCODE_OK)
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cleanup();
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#if defined(CONFIG_MICROCODE_AMD_EARLY) && defined(CONFIG_X86_32)
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/* save BSP's matching patch for early load */
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if (cpu_data(cpu).cpu_index == boot_cpu_data.cpu_index) {
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struct ucode_patch *p = find_patch(cpu);
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if (p) {
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memset(amd_bsp_mpb, 0, MPB_MAX_SIZE);
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memcpy(amd_bsp_mpb, p->data, min_t(u32, ksize(p->data),
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MPB_MAX_SIZE));
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}
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}
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#endif
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return ret;
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}
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222
arch/x86/kernel/microcode_amd_early.c
Normal file
222
arch/x86/kernel/microcode_amd_early.c
Normal file
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@ -0,0 +1,222 @@
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/*
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* Copyright (C) 2013 Advanced Micro Devices, Inc.
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*
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* Author: Jacob Shin <jacob.shin@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/earlycpio.h>
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#include <asm/cpu.h>
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#include <asm/setup.h>
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#include <asm/microcode_amd.h>
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static bool ucode_loaded;
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static u32 ucode_new_rev;
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/*
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* Microcode patch container file is prepended to the initrd in cpio format.
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* See Documentation/x86/early-microcode.txt
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*/
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static __initdata char ucode_path[] = "kernel/x86/microcode/AuthenticAMD.bin";
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static struct cpio_data __init find_ucode_in_initrd(void)
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{
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long offset = 0;
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struct cpio_data cd;
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#ifdef CONFIG_X86_32
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/*
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* On 32-bit, early load occurs before paging is turned on so we need
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* to use physical addresses.
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*/
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if (!(read_cr0() & X86_CR0_PG)) {
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struct boot_params *p;
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p = (struct boot_params *)__pa_nodebug(&boot_params);
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cd = find_cpio_data((char *)__pa_nodebug(ucode_path),
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(void *)p->hdr.ramdisk_image, p->hdr.ramdisk_size,
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&offset);
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} else
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#endif
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cd = find_cpio_data(ucode_path,
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(void *)(boot_params.hdr.ramdisk_image + PAGE_OFFSET),
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boot_params.hdr.ramdisk_size, &offset);
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if (*(u32 *)cd.data != UCODE_MAGIC) {
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cd.data = NULL;
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cd.size = 0;
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}
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return cd;
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}
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/*
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* Early load occurs before we can vmalloc(). So we look for the microcode
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* patch container file in initrd, traverse equivalent cpu table, look for a
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* matching microcode patch, and update, all in initrd memory in place.
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* When vmalloc() is available for use later -- on 64-bit during first AP load,
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* and on 32-bit during save_microcode_in_initrd_amd() -- we can call
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* load_microcode_amd() to save equivalent cpu table and microcode patches in
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* kernel heap memory.
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*/
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static void __init apply_ucode_in_initrd(void)
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{
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struct cpio_data cd;
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struct equiv_cpu_entry *eq;
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u32 *header;
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u8 *data;
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u16 eq_id;
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int offset, left;
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u32 rev, dummy;
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u32 *new_rev;
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#ifdef CONFIG_X86_32
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new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);
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#else
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new_rev = &ucode_new_rev;
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#endif
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cd = find_ucode_in_initrd();
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if (!cd.data)
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return;
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data = cd.data;
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left = cd.size;
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header = (u32 *)data;
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/* find equiv cpu table */
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if (header[1] != UCODE_EQUIV_CPU_TABLE_TYPE || /* type */
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header[2] == 0) /* size */
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return;
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eq = (struct equiv_cpu_entry *)(data + CONTAINER_HDR_SZ);
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offset = header[2] + CONTAINER_HDR_SZ;
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data += offset;
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left -= offset;
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eq_id = find_equiv_id(eq, cpuid_eax(0x00000001));
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if (!eq_id)
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return;
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/* find ucode and update if needed */
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rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
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while (left > 0) {
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struct microcode_amd *mc;
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header = (u32 *)data;
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if (header[0] != UCODE_UCODE_TYPE || /* type */
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header[1] == 0) /* size */
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break;
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mc = (struct microcode_amd *)(data + SECTION_HDR_SIZE);
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if (eq_id == mc->hdr.processor_rev_id && rev < mc->hdr.patch_id)
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if (__apply_microcode_amd(mc) == 0) {
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if (!(*new_rev))
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*new_rev = mc->hdr.patch_id;
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break;
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}
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offset = header[1] + SECTION_HDR_SIZE;
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data += offset;
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left -= offset;
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}
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}
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void __init load_ucode_amd_bsp(void)
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{
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apply_ucode_in_initrd();
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}
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#ifdef CONFIG_X86_32
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u8 __cpuinitdata amd_bsp_mpb[MPB_MAX_SIZE];
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/*
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* On 32-bit, since AP's early load occurs before paging is turned on, we
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* cannot traverse cpu_equiv_table and pcache in kernel heap memory. So during
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* cold boot, AP will apply_ucode_in_initrd() just like the BSP. During
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* save_microcode_in_initrd_amd() BSP's patch is copied to amd_bsp_mpb, which
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* is used upon resume from suspend.
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*/
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void __cpuinit load_ucode_amd_ap(void)
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{
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struct microcode_amd *mc;
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mc = (struct microcode_amd *)__pa_nodebug(amd_bsp_mpb);
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if (mc->hdr.patch_id && mc->hdr.processor_rev_id)
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__apply_microcode_amd(mc);
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else
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apply_ucode_in_initrd();
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}
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static void __init collect_cpu_sig_on_bsp(void *arg)
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{
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unsigned int cpu = smp_processor_id();
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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uci->cpu_sig.sig = cpuid_eax(0x00000001);
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}
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#else
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static void __cpuinit collect_cpu_info_amd_early(struct cpuinfo_x86 *c,
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struct ucode_cpu_info *uci)
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{
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u32 rev, eax;
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rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax);
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eax = cpuid_eax(0x00000001);
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uci->cpu_sig.sig = eax;
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uci->cpu_sig.rev = rev;
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c->microcode = rev;
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c->x86 = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
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}
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void __cpuinit load_ucode_amd_ap(void)
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{
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unsigned int cpu = smp_processor_id();
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collect_cpu_info_amd_early(&cpu_data(cpu), ucode_cpu_info + cpu);
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if (cpu && !ucode_loaded) {
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struct cpio_data cd = find_ucode_in_initrd();
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if (load_microcode_amd(0, cd.data, cd.size) != UCODE_OK)
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return;
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ucode_loaded = true;
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}
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apply_microcode_amd(cpu);
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}
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#endif
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int __init save_microcode_in_initrd_amd(void)
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{
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enum ucode_state ret;
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struct cpio_data cd;
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#ifdef CONFIG_X86_32
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unsigned int bsp = boot_cpu_data.cpu_index;
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struct ucode_cpu_info *uci = ucode_cpu_info + bsp;
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if (!uci->cpu_sig.sig)
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smp_call_function_single(bsp, collect_cpu_sig_on_bsp, NULL, 1);
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#endif
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if (ucode_new_rev)
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pr_info("microcode: updated early to new patch_level=0x%08x\n",
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ucode_new_rev);
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if (ucode_loaded)
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return 0;
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cd = find_ucode_in_initrd();
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if (!cd.data)
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return -EINVAL;
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ret = load_microcode_amd(0, cd.data, cd.size);
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if (ret != UCODE_OK)
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return -EINVAL;
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ucode_loaded = true;
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return 0;
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}
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@ -18,6 +18,7 @@
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*/
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#include <linux/module.h>
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#include <asm/microcode_intel.h>
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#include <asm/microcode_amd.h>
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#include <asm/processor.h>
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#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
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vendor = x86_vendor();
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x86 = x86_family();
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if (vendor == X86_VENDOR_INTEL && x86 >= 6)
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load_ucode_intel_bsp();
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switch (vendor) {
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case X86_VENDOR_INTEL:
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if (x86 >= 6)
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load_ucode_intel_bsp();
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break;
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case X86_VENDOR_AMD:
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if (x86 >= 0x10)
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load_ucode_amd_bsp();
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break;
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default:
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break;
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}
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}
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void __cpuinit load_ucode_ap(void)
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vendor = x86_vendor();
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x86 = x86_family();
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if (vendor == X86_VENDOR_INTEL && x86 >= 6)
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load_ucode_intel_ap();
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switch (vendor) {
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case X86_VENDOR_INTEL:
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if (x86 >= 6)
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load_ucode_intel_ap();
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break;
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case X86_VENDOR_AMD:
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if (x86 >= 0x10)
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load_ucode_amd_ap();
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break;
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default:
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break;
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}
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}
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int __init save_microcode_in_initrd(void)
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{
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struct cpuinfo_x86 *c = &boot_cpu_data;
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if (c->x86_vendor == X86_VENDOR_INTEL && c->x86 >= 6)
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return save_microcode_in_initrd_intel();
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switch (c->x86_vendor) {
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case X86_VENDOR_INTEL:
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if (c->x86 >= 6)
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save_microcode_in_initrd_intel();
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break;
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case X86_VENDOR_AMD:
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if (c->x86 >= 0x10)
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save_microcode_in_initrd_amd();
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break;
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default:
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break;
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}
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return 0;
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}
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