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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-06 10:57:46 +00:00
Merge branch 'chelsio-cxgb-use-threaded-interrupts-for-deferred-work'
Sebastian Andrzej Siewior says: ==================== chelsio: cxgb: Use threaded interrupts for deferred work Patch #2 fixes an issue in which del_timer_sync() and tasklet_kill() is invoked from the interrupt handler. This is probably a rare error case since it disables interrupts / the card in that case. Patch #1 converts a worker to use a threaded interrupt which is then also used in patch #2 instead adding another worker for this task (and flush_work() to synchronise vs rmmod). ==================== Link: https://lore.kernel.org/r/20210202170104.1909200-1-bigeasy@linutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
commit
75b8f78fb9
5 changed files with 99 additions and 81 deletions
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@ -238,7 +238,6 @@ struct adapter {
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int msg_enable;
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int msg_enable;
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u32 mmio_len;
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u32 mmio_len;
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struct work_struct ext_intr_handler_task;
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struct adapter_params params;
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struct adapter_params params;
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/* Terminator modules. */
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/* Terminator modules. */
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@ -257,6 +256,7 @@ struct adapter {
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/* guards async operations */
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/* guards async operations */
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spinlock_t async_lock ____cacheline_aligned;
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spinlock_t async_lock ____cacheline_aligned;
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u32 pending_thread_intr;
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u32 slow_intr_mask;
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u32 slow_intr_mask;
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int t1powersave;
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int t1powersave;
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};
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};
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@ -334,8 +334,7 @@ void t1_interrupts_enable(adapter_t *adapter);
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void t1_interrupts_disable(adapter_t *adapter);
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void t1_interrupts_disable(adapter_t *adapter);
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void t1_interrupts_clear(adapter_t *adapter);
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void t1_interrupts_clear(adapter_t *adapter);
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int t1_elmer0_ext_intr_handler(adapter_t *adapter);
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int t1_elmer0_ext_intr_handler(adapter_t *adapter);
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void t1_elmer0_ext_intr(adapter_t *adapter);
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irqreturn_t t1_slow_intr_handler(adapter_t *adapter);
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int t1_slow_intr_handler(adapter_t *adapter);
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int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
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int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
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const struct board_info *t1_get_board_info(unsigned int board_id);
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const struct board_info *t1_get_board_info(unsigned int board_id);
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@ -347,7 +346,6 @@ int t1_get_board_rev(adapter_t *adapter, const struct board_info *bi,
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int t1_init_hw_modules(adapter_t *adapter);
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int t1_init_hw_modules(adapter_t *adapter);
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int t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi);
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int t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi);
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void t1_free_sw_modules(adapter_t *adapter);
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void t1_free_sw_modules(adapter_t *adapter);
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void t1_fatal_err(adapter_t *adapter);
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void t1_link_changed(adapter_t *adapter, int port_id);
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void t1_link_changed(adapter_t *adapter, int port_id);
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void t1_link_negotiated(adapter_t *adapter, int port_id, int link_stat,
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void t1_link_negotiated(adapter_t *adapter, int port_id, int link_stat,
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int speed, int duplex, int pause);
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int speed, int duplex, int pause);
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@ -211,7 +211,8 @@ static int cxgb_up(struct adapter *adapter)
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t1_interrupts_clear(adapter);
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t1_interrupts_clear(adapter);
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adapter->params.has_msi = !disable_msi && !pci_enable_msi(adapter->pdev);
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adapter->params.has_msi = !disable_msi && !pci_enable_msi(adapter->pdev);
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err = request_irq(adapter->pdev->irq, t1_interrupt,
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err = request_threaded_irq(adapter->pdev->irq, t1_interrupt,
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t1_interrupt_thread,
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adapter->params.has_msi ? 0 : IRQF_SHARED,
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adapter->params.has_msi ? 0 : IRQF_SHARED,
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adapter->name, adapter);
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adapter->name, adapter);
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if (err) {
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if (err) {
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@ -916,51 +917,6 @@ static void mac_stats_task(struct work_struct *work)
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spin_unlock(&adapter->work_lock);
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spin_unlock(&adapter->work_lock);
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}
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}
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/*
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* Processes elmer0 external interrupts in process context.
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*/
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static void ext_intr_task(struct work_struct *work)
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{
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struct adapter *adapter =
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container_of(work, struct adapter, ext_intr_handler_task);
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t1_elmer0_ext_intr_handler(adapter);
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/* Now reenable external interrupts */
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spin_lock_irq(&adapter->async_lock);
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adapter->slow_intr_mask |= F_PL_INTR_EXT;
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writel(F_PL_INTR_EXT, adapter->regs + A_PL_CAUSE);
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writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
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adapter->regs + A_PL_ENABLE);
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spin_unlock_irq(&adapter->async_lock);
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}
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/*
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* Interrupt-context handler for elmer0 external interrupts.
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*/
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void t1_elmer0_ext_intr(struct adapter *adapter)
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{
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/*
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* Schedule a task to handle external interrupts as we require
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* a process context. We disable EXT interrupts in the interim
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* and let the task reenable them when it's done.
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*/
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adapter->slow_intr_mask &= ~F_PL_INTR_EXT;
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writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
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adapter->regs + A_PL_ENABLE);
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schedule_work(&adapter->ext_intr_handler_task);
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}
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void t1_fatal_err(struct adapter *adapter)
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{
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if (adapter->flags & FULL_INIT_DONE) {
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t1_sge_stop(adapter->sge);
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t1_interrupts_disable(adapter);
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}
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pr_alert("%s: encountered fatal error, operation suspended\n",
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adapter->name);
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}
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static const struct net_device_ops cxgb_netdev_ops = {
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static const struct net_device_ops cxgb_netdev_ops = {
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.ndo_open = cxgb_open,
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.ndo_open = cxgb_open,
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.ndo_stop = cxgb_close,
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.ndo_stop = cxgb_close,
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@ -1062,8 +1018,6 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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spin_lock_init(&adapter->async_lock);
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spin_lock_init(&adapter->async_lock);
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spin_lock_init(&adapter->mac_lock);
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spin_lock_init(&adapter->mac_lock);
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INIT_WORK(&adapter->ext_intr_handler_task,
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ext_intr_task);
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INIT_DELAYED_WORK(&adapter->stats_update_task,
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INIT_DELAYED_WORK(&adapter->stats_update_task,
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mac_stats_task);
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mac_stats_task);
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@ -940,10 +940,11 @@ void t1_sge_intr_clear(struct sge *sge)
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/*
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/*
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* SGE 'Error' interrupt handler
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* SGE 'Error' interrupt handler
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*/
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*/
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int t1_sge_intr_error_handler(struct sge *sge)
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bool t1_sge_intr_error_handler(struct sge *sge)
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{
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{
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struct adapter *adapter = sge->adapter;
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struct adapter *adapter = sge->adapter;
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u32 cause = readl(adapter->regs + A_SG_INT_CAUSE);
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u32 cause = readl(adapter->regs + A_SG_INT_CAUSE);
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bool wake = false;
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if (adapter->port[0].dev->hw_features & NETIF_F_TSO)
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if (adapter->port[0].dev->hw_features & NETIF_F_TSO)
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cause &= ~F_PACKET_TOO_BIG;
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cause &= ~F_PACKET_TOO_BIG;
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@ -967,11 +968,14 @@ int t1_sge_intr_error_handler(struct sge *sge)
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sge->stats.pkt_mismatch++;
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sge->stats.pkt_mismatch++;
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pr_alert("%s: SGE packet mismatch\n", adapter->name);
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pr_alert("%s: SGE packet mismatch\n", adapter->name);
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}
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}
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if (cause & SGE_INT_FATAL)
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if (cause & SGE_INT_FATAL) {
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t1_fatal_err(adapter);
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t1_interrupts_disable(adapter);
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adapter->pending_thread_intr |= F_PL_INTR_SGE_ERR;
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wake = true;
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}
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writel(cause, adapter->regs + A_SG_INT_CAUSE);
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writel(cause, adapter->regs + A_SG_INT_CAUSE);
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return 0;
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return wake;
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}
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}
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const struct sge_intr_counts *t1_sge_get_intr_counts(const struct sge *sge)
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const struct sge_intr_counts *t1_sge_get_intr_counts(const struct sge *sge)
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@ -1619,11 +1623,46 @@ int t1_poll(struct napi_struct *napi, int budget)
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return work_done;
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return work_done;
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}
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}
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irqreturn_t t1_interrupt_thread(int irq, void *data)
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{
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struct adapter *adapter = data;
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u32 pending_thread_intr;
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spin_lock_irq(&adapter->async_lock);
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pending_thread_intr = adapter->pending_thread_intr;
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adapter->pending_thread_intr = 0;
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spin_unlock_irq(&adapter->async_lock);
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if (!pending_thread_intr)
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return IRQ_NONE;
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if (pending_thread_intr & F_PL_INTR_EXT)
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t1_elmer0_ext_intr_handler(adapter);
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/* This error is fatal, interrupts remain off */
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if (pending_thread_intr & F_PL_INTR_SGE_ERR) {
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pr_alert("%s: encountered fatal error, operation suspended\n",
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adapter->name);
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t1_sge_stop(adapter->sge);
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return IRQ_HANDLED;
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}
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spin_lock_irq(&adapter->async_lock);
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adapter->slow_intr_mask |= F_PL_INTR_EXT;
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writel(F_PL_INTR_EXT, adapter->regs + A_PL_CAUSE);
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writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
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adapter->regs + A_PL_ENABLE);
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spin_unlock_irq(&adapter->async_lock);
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return IRQ_HANDLED;
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}
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irqreturn_t t1_interrupt(int irq, void *data)
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irqreturn_t t1_interrupt(int irq, void *data)
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{
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{
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struct adapter *adapter = data;
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struct adapter *adapter = data;
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struct sge *sge = adapter->sge;
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struct sge *sge = adapter->sge;
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int handled;
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irqreturn_t handled;
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if (likely(responses_pending(adapter))) {
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if (likely(responses_pending(adapter))) {
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writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE);
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writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE);
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@ -1645,10 +1684,10 @@ irqreturn_t t1_interrupt(int irq, void *data)
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handled = t1_slow_intr_handler(adapter);
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handled = t1_slow_intr_handler(adapter);
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spin_unlock(&adapter->async_lock);
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spin_unlock(&adapter->async_lock);
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if (!handled)
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if (handled == IRQ_NONE)
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sge->stats.unhandled_irqs++;
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sge->stats.unhandled_irqs++;
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return IRQ_RETVAL(handled != 0);
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return handled;
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}
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}
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/*
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/*
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@ -74,6 +74,7 @@ struct sge *t1_sge_create(struct adapter *, struct sge_params *);
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int t1_sge_configure(struct sge *, struct sge_params *);
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int t1_sge_configure(struct sge *, struct sge_params *);
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int t1_sge_set_coalesce_params(struct sge *, struct sge_params *);
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int t1_sge_set_coalesce_params(struct sge *, struct sge_params *);
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void t1_sge_destroy(struct sge *);
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void t1_sge_destroy(struct sge *);
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irqreturn_t t1_interrupt_thread(int irq, void *data);
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irqreturn_t t1_interrupt(int irq, void *cookie);
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irqreturn_t t1_interrupt(int irq, void *cookie);
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int t1_poll(struct napi_struct *, int);
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int t1_poll(struct napi_struct *, int);
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@ -81,7 +82,7 @@ netdev_tx_t t1_start_xmit(struct sk_buff *skb, struct net_device *dev);
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void t1_vlan_mode(struct adapter *adapter, netdev_features_t features);
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void t1_vlan_mode(struct adapter *adapter, netdev_features_t features);
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void t1_sge_start(struct sge *);
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void t1_sge_start(struct sge *);
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void t1_sge_stop(struct sge *);
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void t1_sge_stop(struct sge *);
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int t1_sge_intr_error_handler(struct sge *);
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bool t1_sge_intr_error_handler(struct sge *sge);
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void t1_sge_intr_enable(struct sge *);
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void t1_sge_intr_enable(struct sge *);
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void t1_sge_intr_disable(struct sge *);
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void t1_sge_intr_disable(struct sge *);
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void t1_sge_intr_clear(struct sge *);
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void t1_sge_intr_clear(struct sge *);
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@ -170,7 +170,7 @@ void t1_link_changed(adapter_t *adapter, int port_id)
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t1_link_negotiated(adapter, port_id, link_ok, speed, duplex, fc);
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t1_link_negotiated(adapter, port_id, link_ok, speed, duplex, fc);
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}
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}
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static int t1_pci_intr_handler(adapter_t *adapter)
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static bool t1_pci_intr_handler(adapter_t *adapter)
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{
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{
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u32 pcix_cause;
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u32 pcix_cause;
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@ -179,9 +179,13 @@ static int t1_pci_intr_handler(adapter_t *adapter)
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if (pcix_cause) {
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if (pcix_cause) {
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pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_CAUSE,
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pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_CAUSE,
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pcix_cause);
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pcix_cause);
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t1_fatal_err(adapter); /* PCI errors are fatal */
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/* PCI errors are fatal */
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t1_interrupts_disable(adapter);
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adapter->pending_thread_intr |= F_PL_INTR_SGE_ERR;
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pr_alert("%s: PCI error encountered.\n", adapter->name);
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return true;
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}
|
}
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return 0;
|
return false;
|
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}
|
}
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|
|
||||||
#ifdef CONFIG_CHELSIO_T1_1G
|
#ifdef CONFIG_CHELSIO_T1_1G
|
||||||
|
@ -210,13 +214,16 @@ static int fpga_phy_intr_handler(adapter_t *adapter)
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/*
|
/*
|
||||||
* Slow path interrupt handler for FPGAs.
|
* Slow path interrupt handler for FPGAs.
|
||||||
*/
|
*/
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static int fpga_slow_intr(adapter_t *adapter)
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static irqreturn_t fpga_slow_intr(adapter_t *adapter)
|
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{
|
{
|
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u32 cause = readl(adapter->regs + A_PL_CAUSE);
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u32 cause = readl(adapter->regs + A_PL_CAUSE);
|
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irqreturn_t ret = IRQ_NONE;
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|
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||||||
cause &= ~F_PL_INTR_SGE_DATA;
|
cause &= ~F_PL_INTR_SGE_DATA;
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if (cause & F_PL_INTR_SGE_ERR)
|
if (cause & F_PL_INTR_SGE_ERR) {
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t1_sge_intr_error_handler(adapter->sge);
|
if (t1_sge_intr_error_handler(adapter->sge))
|
||||||
|
ret = IRQ_WAKE_THREAD;
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||||||
|
}
|
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|
|
||||||
if (cause & FPGA_PCIX_INTERRUPT_GMAC)
|
if (cause & FPGA_PCIX_INTERRUPT_GMAC)
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fpga_phy_intr_handler(adapter);
|
fpga_phy_intr_handler(adapter);
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|
@ -231,14 +238,19 @@ static int fpga_slow_intr(adapter_t *adapter)
|
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/* Clear TP interrupt */
|
/* Clear TP interrupt */
|
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writel(tp_cause, adapter->regs + FPGA_TP_ADDR_INTERRUPT_CAUSE);
|
writel(tp_cause, adapter->regs + FPGA_TP_ADDR_INTERRUPT_CAUSE);
|
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}
|
}
|
||||||
if (cause & FPGA_PCIX_INTERRUPT_PCIX)
|
if (cause & FPGA_PCIX_INTERRUPT_PCIX) {
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t1_pci_intr_handler(adapter);
|
if (t1_pci_intr_handler(adapter))
|
||||||
|
ret = IRQ_WAKE_THREAD;
|
||||||
|
}
|
||||||
|
|
||||||
/* Clear the interrupts just processed. */
|
/* Clear the interrupts just processed. */
|
||||||
if (cause)
|
if (cause)
|
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writel(cause, adapter->regs + A_PL_CAUSE);
|
writel(cause, adapter->regs + A_PL_CAUSE);
|
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|
|
||||||
return cause != 0;
|
if (ret != IRQ_NONE)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
return cause == 0 ? IRQ_NONE : IRQ_HANDLED;
|
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}
|
}
|
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#endif
|
#endif
|
||||||
|
|
||||||
|
@ -842,31 +854,45 @@ void t1_interrupts_clear(adapter_t* adapter)
|
||||||
/*
|
/*
|
||||||
* Slow path interrupt handler for ASICs.
|
* Slow path interrupt handler for ASICs.
|
||||||
*/
|
*/
|
||||||
static int asic_slow_intr(adapter_t *adapter)
|
static irqreturn_t asic_slow_intr(adapter_t *adapter)
|
||||||
{
|
{
|
||||||
u32 cause = readl(adapter->regs + A_PL_CAUSE);
|
u32 cause = readl(adapter->regs + A_PL_CAUSE);
|
||||||
|
irqreturn_t ret = IRQ_HANDLED;
|
||||||
|
|
||||||
cause &= adapter->slow_intr_mask;
|
cause &= adapter->slow_intr_mask;
|
||||||
if (!cause)
|
if (!cause)
|
||||||
return 0;
|
return IRQ_NONE;
|
||||||
if (cause & F_PL_INTR_SGE_ERR)
|
if (cause & F_PL_INTR_SGE_ERR) {
|
||||||
t1_sge_intr_error_handler(adapter->sge);
|
if (t1_sge_intr_error_handler(adapter->sge))
|
||||||
|
ret = IRQ_WAKE_THREAD;
|
||||||
|
}
|
||||||
if (cause & F_PL_INTR_TP)
|
if (cause & F_PL_INTR_TP)
|
||||||
t1_tp_intr_handler(adapter->tp);
|
t1_tp_intr_handler(adapter->tp);
|
||||||
if (cause & F_PL_INTR_ESPI)
|
if (cause & F_PL_INTR_ESPI)
|
||||||
t1_espi_intr_handler(adapter->espi);
|
t1_espi_intr_handler(adapter->espi);
|
||||||
if (cause & F_PL_INTR_PCIX)
|
if (cause & F_PL_INTR_PCIX) {
|
||||||
t1_pci_intr_handler(adapter);
|
if (t1_pci_intr_handler(adapter))
|
||||||
if (cause & F_PL_INTR_EXT)
|
ret = IRQ_WAKE_THREAD;
|
||||||
t1_elmer0_ext_intr(adapter);
|
}
|
||||||
|
if (cause & F_PL_INTR_EXT) {
|
||||||
|
/* Wake the threaded interrupt to handle external interrupts as
|
||||||
|
* we require a process context. We disable EXT interrupts in
|
||||||
|
* the interim and let the thread reenable them when it's done.
|
||||||
|
*/
|
||||||
|
adapter->pending_thread_intr |= F_PL_INTR_EXT;
|
||||||
|
adapter->slow_intr_mask &= ~F_PL_INTR_EXT;
|
||||||
|
writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
|
||||||
|
adapter->regs + A_PL_ENABLE);
|
||||||
|
ret = IRQ_WAKE_THREAD;
|
||||||
|
}
|
||||||
|
|
||||||
/* Clear the interrupts just processed. */
|
/* Clear the interrupts just processed. */
|
||||||
writel(cause, adapter->regs + A_PL_CAUSE);
|
writel(cause, adapter->regs + A_PL_CAUSE);
|
||||||
readl(adapter->regs + A_PL_CAUSE); /* flush writes */
|
readl(adapter->regs + A_PL_CAUSE); /* flush writes */
|
||||||
return 1;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
int t1_slow_intr_handler(adapter_t *adapter)
|
irqreturn_t t1_slow_intr_handler(adapter_t *adapter)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_CHELSIO_T1_1G
|
#ifdef CONFIG_CHELSIO_T1_1G
|
||||||
if (!t1_is_asic(adapter))
|
if (!t1_is_asic(adapter))
|
||||||
|
|
Loading…
Reference in a new issue