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arm64: dts: qcom: sm6125: fix SDHCI CQE reg names
[ Upstream commit3de1172624
] SM6125 comes with SDCC (SDHCI controller) v5, so the second range of registers is cqhci, not core. Fixes:cff4bbaf2a
("arm64: dts: qcom: Add support for SM6125") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Tested-by: Marijn Suijten <marijn.suijten@somainline.org> # Sony Xperia 10 II Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221026163646.37433-1-krzysztof.kozlowski@linaro.org Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -408,7 +408,7 @@ rpm_msg_ram: sram@45f0000 {
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sdhc_1: sdhci@4744000 {
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compatible = "qcom,sm6125-sdhci", "qcom,sdhci-msm-v5";
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reg = <0x04744000 0x1000>, <0x04745000 0x1000>;
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reg-names = "hc", "core";
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reg-names = "hc", "cqhci";
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interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
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