From 75c15b90e42373a3c651d53e6e55239b0f03777d Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Mon, 26 Jun 2017 17:25:24 +0200 Subject: [PATCH] soc/tegra: fuse: Add Tegra186 chip ID support The register region containing chip ID information has been relocated in Tegra186 and changed in backwards-incompatible ways. Add a compatible string to allow the driver to make the distinction. Signed-off-by: Thierry Reding --- drivers/soc/tegra/fuse/tegra-apbmisc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c index b1f8b23277b9..e5a4d8f98b10 100644 --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c @@ -74,6 +74,7 @@ u32 tegra_read_ram_code(void) static const struct of_device_id apbmisc_match[] __initconst = { { .compatible = "nvidia,tegra20-apbmisc", }, + { .compatible = "nvidia,tegra186-misc", }, {}, };