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sh_eth: fix TRSCER mask for R7S72100
[ Upstream commit75be7fb7f9
] According to the RZ/A1H Group, RZ/A1M Group User's Manual: Hardware, Rev. 4.00, the TRSCER register has bit 9 reserved, hence we can't use the driver's default TRSCER mask. Add the explicit initializer for sh_eth_cpu_data::trscer_err_mask for R7S72100. Fixes:db893473d3
("sh_eth: Add support for r7s72100") Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -560,6 +560,8 @@ static struct sh_eth_cpu_data r7s72100_data = {
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EESR_TDE,
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.fdr_value = 0x0000070f,
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.trscer_err_mask = DESC_I_RINT8 | DESC_I_RINT5,
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.no_psr = 1,
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.apr = 1,
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.mpr = 1,
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