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KVM-ARM fixes, mostly coming from the PMU work.
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJWuLKAAAoJEL/70l94x66DfoMH+wUcYQ3we2STZc23yj9LIj3o xTLwBLHv3ZIjJhjhyYNkQNey+TXbnzf1oL1xeT5JZTMeVIf9KDP8KW9tuKJ4vDjf q02WT/uKkZLUAaOlsQ8k+izfqfnp2Q4wcsrBOepaUqmLzonOcAtSfBQq2s1YCa5f wtK1mojgKXgC0Kke5D61gTgSLaNQWghaMm09UB8Wg3QPcwu5VLmJIPhnWwS/QVG/ tNDIkK4+pyY7vNAIp2t13tUa4/9UsC2U99Pl8iVdzKKefv49t+iBI4FeR9zTlBSq 2dXoemCGWePf77M6myagczNb9BRFweu8bsVeQuBo2M8UbNUsowkvBYyhdkihJHg= =LCsT -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull KVM fixes from Paolo Bonzini: "KVM-ARM fixes, mostly coming from the PMU work" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: arm64: KVM: Fix guest dead loop when register accessor returns false arm64: KVM: Fix comments of the CP handler arm64: KVM: Fix wrong use of the CPSR MODE mask for 32bit guests arm64: KVM: Obey RES0/1 reserved bits when setting CPTR_EL2 arm64: KVM: Fix AArch64 guest userspace exception injection
This commit is contained in:
commit
765bdb406d
5 changed files with 52 additions and 12 deletions
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@ -182,6 +182,7 @@
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#define CPTR_EL2_TCPAC (1 << 31)
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#define CPTR_EL2_TCPAC (1 << 31)
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#define CPTR_EL2_TTA (1 << 20)
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#define CPTR_EL2_TTA (1 << 20)
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#define CPTR_EL2_TFP (1 << CPTR_EL2_TFP_SHIFT)
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#define CPTR_EL2_TFP (1 << CPTR_EL2_TFP_SHIFT)
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#define CPTR_EL2_DEFAULT 0x000033ff
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/* Hyp Debug Configuration Register bits */
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/* Hyp Debug Configuration Register bits */
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#define MDCR_EL2_TDRA (1 << 11)
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#define MDCR_EL2_TDRA (1 << 11)
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@ -127,10 +127,14 @@ static inline unsigned long *vcpu_spsr(const struct kvm_vcpu *vcpu)
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static inline bool vcpu_mode_priv(const struct kvm_vcpu *vcpu)
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static inline bool vcpu_mode_priv(const struct kvm_vcpu *vcpu)
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{
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{
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u32 mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK;
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u32 mode;
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if (vcpu_mode_is_32bit(vcpu))
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if (vcpu_mode_is_32bit(vcpu)) {
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mode = *vcpu_cpsr(vcpu) & COMPAT_PSR_MODE_MASK;
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return mode > COMPAT_PSR_MODE_USR;
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return mode > COMPAT_PSR_MODE_USR;
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}
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mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK;
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return mode != PSR_MODE_EL0t;
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return mode != PSR_MODE_EL0t;
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}
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}
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@ -36,7 +36,11 @@ static void __hyp_text __activate_traps(struct kvm_vcpu *vcpu)
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write_sysreg(val, hcr_el2);
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write_sysreg(val, hcr_el2);
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/* Trap on AArch32 cp15 c15 accesses (EL1 or EL0) */
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/* Trap on AArch32 cp15 c15 accesses (EL1 or EL0) */
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write_sysreg(1 << 15, hstr_el2);
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write_sysreg(1 << 15, hstr_el2);
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write_sysreg(CPTR_EL2_TTA | CPTR_EL2_TFP, cptr_el2);
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val = CPTR_EL2_DEFAULT;
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val |= CPTR_EL2_TTA | CPTR_EL2_TFP;
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write_sysreg(val, cptr_el2);
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write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2);
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write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2);
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}
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}
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@ -45,7 +49,7 @@ static void __hyp_text __deactivate_traps(struct kvm_vcpu *vcpu)
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write_sysreg(HCR_RW, hcr_el2);
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write_sysreg(HCR_RW, hcr_el2);
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write_sysreg(0, hstr_el2);
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write_sysreg(0, hstr_el2);
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write_sysreg(read_sysreg(mdcr_el2) & MDCR_EL2_HPMN_MASK, mdcr_el2);
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write_sysreg(read_sysreg(mdcr_el2) & MDCR_EL2_HPMN_MASK, mdcr_el2);
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write_sysreg(0, cptr_el2);
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write_sysreg(CPTR_EL2_DEFAULT, cptr_el2);
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}
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}
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static void __hyp_text __activate_vm(struct kvm_vcpu *vcpu)
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static void __hyp_text __activate_vm(struct kvm_vcpu *vcpu)
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@ -27,7 +27,11 @@
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#define PSTATE_FAULT_BITS_64 (PSR_MODE_EL1h | PSR_A_BIT | PSR_F_BIT | \
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#define PSTATE_FAULT_BITS_64 (PSR_MODE_EL1h | PSR_A_BIT | PSR_F_BIT | \
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PSR_I_BIT | PSR_D_BIT)
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PSR_I_BIT | PSR_D_BIT)
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#define EL1_EXCEPT_SYNC_OFFSET 0x200
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#define CURRENT_EL_SP_EL0_VECTOR 0x0
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#define CURRENT_EL_SP_ELx_VECTOR 0x200
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#define LOWER_EL_AArch64_VECTOR 0x400
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#define LOWER_EL_AArch32_VECTOR 0x600
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static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
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static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
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{
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{
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@ -97,6 +101,34 @@ static void inject_abt32(struct kvm_vcpu *vcpu, bool is_pabt,
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*fsr = 0x14;
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*fsr = 0x14;
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}
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}
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enum exception_type {
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except_type_sync = 0,
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except_type_irq = 0x80,
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except_type_fiq = 0x100,
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except_type_serror = 0x180,
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};
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static u64 get_except_vector(struct kvm_vcpu *vcpu, enum exception_type type)
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{
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u64 exc_offset;
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switch (*vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT)) {
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case PSR_MODE_EL1t:
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exc_offset = CURRENT_EL_SP_EL0_VECTOR;
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break;
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case PSR_MODE_EL1h:
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exc_offset = CURRENT_EL_SP_ELx_VECTOR;
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break;
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case PSR_MODE_EL0t:
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exc_offset = LOWER_EL_AArch64_VECTOR;
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break;
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default:
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exc_offset = LOWER_EL_AArch32_VECTOR;
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}
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return vcpu_sys_reg(vcpu, VBAR_EL1) + exc_offset + type;
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}
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static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr)
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static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr)
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{
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{
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unsigned long cpsr = *vcpu_cpsr(vcpu);
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unsigned long cpsr = *vcpu_cpsr(vcpu);
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@ -108,8 +140,8 @@ static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr
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*vcpu_spsr(vcpu) = cpsr;
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*vcpu_spsr(vcpu) = cpsr;
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*vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
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*vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
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*vcpu_pc(vcpu) = get_except_vector(vcpu, except_type_sync);
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*vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
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*vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
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*vcpu_pc(vcpu) = vcpu_sys_reg(vcpu, VBAR_EL1) + EL1_EXCEPT_SYNC_OFFSET;
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vcpu_sys_reg(vcpu, FAR_EL1) = addr;
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vcpu_sys_reg(vcpu, FAR_EL1) = addr;
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@ -143,8 +175,8 @@ static void inject_undef64(struct kvm_vcpu *vcpu)
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*vcpu_spsr(vcpu) = cpsr;
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*vcpu_spsr(vcpu) = cpsr;
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*vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
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*vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
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*vcpu_pc(vcpu) = get_except_vector(vcpu, except_type_sync);
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*vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
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*vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
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*vcpu_pc(vcpu) = vcpu_sys_reg(vcpu, VBAR_EL1) + EL1_EXCEPT_SYNC_OFFSET;
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/*
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/*
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* Build an unknown exception, depending on the instruction
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* Build an unknown exception, depending on the instruction
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@ -1007,11 +1007,10 @@ static int emulate_cp(struct kvm_vcpu *vcpu,
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if (likely(r->access(vcpu, params, r))) {
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if (likely(r->access(vcpu, params, r))) {
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/* Skip instruction, since it was emulated */
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/* Skip instruction, since it was emulated */
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kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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}
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/* Handled */
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/* Handled */
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return 0;
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return 0;
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}
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}
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}
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/* Not handled */
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/* Not handled */
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return -1;
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return -1;
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@ -1043,7 +1042,7 @@ static void unhandled_cp_access(struct kvm_vcpu *vcpu,
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}
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}
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/**
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/**
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* kvm_handle_cp_64 -- handles a mrrc/mcrr trap on a guest CP15 access
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* kvm_handle_cp_64 -- handles a mrrc/mcrr trap on a guest CP14/CP15 access
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* @vcpu: The VCPU pointer
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* @vcpu: The VCPU pointer
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* @run: The kvm_run struct
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* @run: The kvm_run struct
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*/
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*/
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@ -1095,7 +1094,7 @@ static int kvm_handle_cp_64(struct kvm_vcpu *vcpu,
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}
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}
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/**
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/**
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* kvm_handle_cp15_32 -- handles a mrc/mcr trap on a guest CP15 access
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* kvm_handle_cp_32 -- handles a mrc/mcr trap on a guest CP14/CP15 access
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* @vcpu: The VCPU pointer
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* @vcpu: The VCPU pointer
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* @run: The kvm_run struct
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* @run: The kvm_run struct
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*/
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*/
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