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ARM: imx5x: clean up ARCH_MX5X
Move to SOC_SOC_IMX5X. Leave only places which prevent multi-soc using ARCH_MX5X. Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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48f6b09996
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6 changed files with 12 additions and 11 deletions
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@ -1,5 +1,6 @@
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if ARCH_MX5
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# ARCH_MX51 and ARCH_MX50 are left for compatibility
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# ARCH_MX50/51/53 are left to mark places where prevent multi-soc in single
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# image. So for most time, SOC_IMX50/51/53 should be used.
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config ARCH_MX50
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bool
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@ -194,7 +194,7 @@ static int __init imxXX_add_imx_dma(void)
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} else
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#endif
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#if defined(CONFIG_ARCH_MX51)
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#if defined(CONFIG_SOC_IMX51)
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if (cpu_is_mx51()) {
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imx51_imx_sdma_data.pdata.script_addrs = &addr_imx51_to1;
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ret = imx_add_imx_sdma(&imx51_imx_sdma_data);
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@ -23,17 +23,17 @@
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#define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS
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/* these are ordered by size to support multi-SoC kernels */
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#if defined CONFIG_ARCH_MX53
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#if defined CONFIG_SOC_IMX53
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#define MXC_GPIO_IRQS (32 * 7)
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#elif defined CONFIG_ARCH_MX2
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#define MXC_GPIO_IRQS (32 * 6)
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#elif defined CONFIG_ARCH_MX50
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#elif defined CONFIG_SOC_IMX50
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#define MXC_GPIO_IRQS (32 * 6)
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#elif defined CONFIG_ARCH_MX1
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#define MXC_GPIO_IRQS (32 * 4)
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#elif defined CONFIG_ARCH_MX25
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#define MXC_GPIO_IRQS (32 * 4)
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#elif defined CONFIG_ARCH_MX51
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#elif defined CONFIG_SOC_IMX51
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#define MXC_GPIO_IRQS (32 * 4)
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#elif defined CONFIG_ARCH_MXC91231
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#define MXC_GPIO_IRQS (32 * 4)
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@ -127,7 +127,7 @@ extern unsigned int __mxc_cpu_type;
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# define cpu_is_mx35() (0)
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#endif
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#ifdef CONFIG_ARCH_MX50
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#ifdef CONFIG_SOC_IMX50
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# ifdef mxc_cpu_type
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# undef mxc_cpu_type
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# define mxc_cpu_type __mxc_cpu_type
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@ -139,7 +139,7 @@ extern unsigned int __mxc_cpu_type;
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# define cpu_is_mx50() (0)
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#endif
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#ifdef CONFIG_ARCH_MX51
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#ifdef CONFIG_SOC_IMX51
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# ifdef mxc_cpu_type
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# undef mxc_cpu_type
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# define mxc_cpu_type __mxc_cpu_type
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@ -151,7 +151,7 @@ extern unsigned int __mxc_cpu_type;
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# define cpu_is_mx51() (0)
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#endif
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#ifdef CONFIG_ARCH_MX53
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#ifdef CONFIG_SOC_IMX53
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# ifdef mxc_cpu_type
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# undef mxc_cpu_type
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# define mxc_cpu_type __mxc_cpu_type
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@ -476,7 +476,7 @@ config MTD_NAND_MPC5121_NFC
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config MTD_NAND_MXC
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tristate "MXC NAND support"
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depends on ARCH_MX2 || ARCH_MX25 || ARCH_MX3 || ARCH_MX51
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depends on IMX_HAVE_PLATFORM_MXC_NAND
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help
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This enables the driver for the NAND flash controller on the
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MXC processors.
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@ -164,10 +164,10 @@ config SPI_IMX_VER_0_4
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def_bool y if ARCH_MX31
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config SPI_IMX_VER_0_7
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def_bool y if ARCH_MX25 || ARCH_MX35 || ARCH_MX51 || ARCH_MX53
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def_bool y if ARCH_MX25 || ARCH_MX35 || SOC_IMX51 || SOC_IMX53
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config SPI_IMX_VER_2_3
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def_bool y if ARCH_MX51 || ARCH_MX53
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def_bool y if SOC_IMX51 || SOC_IMX53
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config SPI_IMX
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tristate "Freescale i.MX SPI controllers"
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