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ARC: mm: split arc_cache_init to allow __init reaping of bulk
arc_cache_init() is called for each core so can't be tagged __init. However bulk of it is only executed by master core and thus is candidate for __init reaping. So split it up to allow that. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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1 changed files with 19 additions and 14 deletions
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@ -993,7 +993,7 @@ SYSCALL_DEFINE3(cacheflush, uint32_t, start, uint32_t, sz, uint32_t, flags)
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* 3. All Caches need to be disabled when setting up IOC to elide any in-flight
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* Coherency transactions
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*/
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noinline void arc_ioc_setup(void)
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noinline void __init arc_ioc_setup(void)
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{
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unsigned int ap_sz;
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@ -1023,21 +1023,9 @@ noinline void arc_ioc_setup(void)
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__dc_enable();
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}
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void arc_cache_init(void)
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void __init arc_cache_init_master(void)
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{
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unsigned int __maybe_unused cpu = smp_processor_id();
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char str[256];
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printk(arc_cache_mumbojumbo(0, str, sizeof(str)));
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/*
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* Only master CPU needs to execute rest of function:
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* - Assume SMP so all cores will have same cache config so
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* any geomtry checks will be same for all
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* - IOC setup / dma callbacks only need to be setup once
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*/
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if (cpu)
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return;
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if (IS_ENABLED(CONFIG_ARC_HAS_ICACHE)) {
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struct cpuinfo_arc_cache *ic = &cpuinfo_arc700[cpu].icache;
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@ -1106,3 +1094,20 @@ void arc_cache_init(void)
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__dma_cache_wback = __dma_cache_wback_l1;
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}
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}
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void __ref arc_cache_init(void)
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{
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unsigned int __maybe_unused cpu = smp_processor_id();
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char str[256];
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printk(arc_cache_mumbojumbo(0, str, sizeof(str)));
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/*
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* Only master CPU needs to execute rest of function:
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* - Assume SMP so all cores will have same cache config so
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* any geomtry checks will be same for all
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* - IOC setup / dma callbacks only need to be setup once
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*/
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if (!cpu)
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arc_cache_init_master();
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}
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