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PCI: mobiveil: Mask out hardcoded bits in inbound/outbound windows setup

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The lower 10 bits of window size field are hardcoded to zero in HW so
they can't really be changed but the lower 10-bit of PAB_AXI_AMAP_CTRL
register are used for control fields, so while programming inbound and
outbout windows decoding we should mask out the lower 10-bit of window
size to prevent overriding the control bits.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
This commit is contained in:
Hou Zhiqiang 2019-07-05 17:56:50 +08:00 committed by Lorenzo Pieralisi
parent cf22c591f9
commit 7717c7d7da
1 changed files with 2 additions and 2 deletions
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4
drivers/pci/controller/pcie-mobiveil.c
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@ -474,7 +474,7 @@ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num,
value = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num));
value &= ~(AMAP_CTRL_TYPE_MASK << AMAP_CTRL_TYPE_SHIFT | WIN_SIZE_MASK);
value |= type << AMAP_CTRL_TYPE_SHIFT | 1 << AMAP_CTRL_EN_SHIFT |
lower_32_bits(size64);
(lower_32_bits(size64) & WIN_SIZE_MASK);
csr_writel(pcie, value, PAB_PEX_AMAP_CTRL(win_num));
csr_writel(pcie, upper_32_bits(size64),
@ -509,7 +509,7 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num,
value = csr_readl(pcie, PAB_AXI_AMAP_CTRL(win_num));
value &= ~(WIN_TYPE_MASK << WIN_TYPE_SHIFT | WIN_SIZE_MASK);
value |= 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT |
lower_32_bits(size64);
(lower_32_bits(size64) & WIN_SIZE_MASK);
csr_writel(pcie, value, PAB_AXI_AMAP_CTRL(win_num));
csr_writel(pcie, upper_32_bits(size64), PAB_EXT_AXI_AMAP_SIZE(win_num));