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[ARM] 5104/1: CM-X270: PCMCIA updates

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Convert to use gpio_lib interface.
Remove support for second PCMCIA slot to avoid run-time conflicts with MMC/SD
because of shared GPIO

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Mike Rapoport 2008-06-17 09:48:03 +01:00 committed by Russell King
parent 2f01a97372
commit 779c545d94
1 changed files with 25 additions and 64 deletions
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89
drivers/pcmcia/pxa2xx_cm_x270.c
View file

@ -5,83 +5,60 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Compulab Ltd., 2003, 2007
* Compulab Ltd., 2003, 2007, 2008
* Mike Rapoport <mike@compulab.co.il>
*
*/
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/platform_device.h>
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <pcmcia/ss.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa2xx-gpio.h>
#include <asm/arch/cm-x270.h>
#include "soc_common.h"
#define GPIO_PCMCIA_S0_CD_VALID (84)
#define GPIO_PCMCIA_S0_RDYINT (82)
#define GPIO_PCMCIA_RESET (53)
#define PCMCIA_S0_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID)
#define PCMCIA_S0_RDYINT IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT)
static struct pcmcia_irqs irqs[] = {
{ 0, PCMCIA_S0_CD_VALID, "PCMCIA0 CD" },
{ 1, PCMCIA_S1_CD_VALID, "PCMCIA1 CD" },
};
static int cmx270_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
{
GPSR(GPIO48_nPOE) = GPIO_bit(GPIO48_nPOE) |
GPIO_bit(GPIO49_nPWE) |
GPIO_bit(GPIO50_nPIOR) |
GPIO_bit(GPIO51_nPIOW) |
GPIO_bit(GPIO85_nPCE_1) |
GPIO_bit(GPIO54_nPCE_2);
int ret = gpio_request(GPIO_PCMCIA_RESET, "PCCard reset");
if (ret)
return ret;
gpio_direction_output(GPIO_PCMCIA_RESET, 0);
pxa_gpio_mode(GPIO48_nPOE_MD);
pxa_gpio_mode(GPIO49_nPWE_MD);
pxa_gpio_mode(GPIO50_nPIOR_MD);
pxa_gpio_mode(GPIO51_nPIOW_MD);
pxa_gpio_mode(GPIO85_nPCE_1_MD);
pxa_gpio_mode(GPIO54_nPCE_2_MD);
pxa_gpio_mode(GPIO55_nPREG_MD);
pxa_gpio_mode(GPIO56_nPWAIT_MD);
pxa_gpio_mode(GPIO57_nIOIS16_MD);
skt->irq = PCMCIA_S0_RDYINT;
ret = soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
if (!ret)
gpio_free(GPIO_PCMCIA_RESET);
/* Reset signal */
pxa_gpio_mode(GPIO53_nPCE_2 | GPIO_OUT);
GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
set_irq_type(PCMCIA_S0_CD_VALID, IRQ_TYPE_EDGE_BOTH);
set_irq_type(PCMCIA_S1_CD_VALID, IRQ_TYPE_EDGE_BOTH);
/* irq's for slots: */
set_irq_type(PCMCIA_S0_RDYINT, IRQ_TYPE_EDGE_FALLING);
set_irq_type(PCMCIA_S1_RDYINT, IRQ_TYPE_EDGE_FALLING);
skt->irq = (skt->nr == 0) ? PCMCIA_S0_RDYINT : PCMCIA_S1_RDYINT;
return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
return ret;
}
static void cmx270_pcmcia_shutdown(struct soc_pcmcia_socket *skt)
{
soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
set_irq_type(IRQ_TO_GPIO(PCMCIA_S0_CD_VALID), IRQ_TYPE_NONE);
set_irq_type(IRQ_TO_GPIO(PCMCIA_S1_CD_VALID), IRQ_TYPE_NONE);
set_irq_type(IRQ_TO_GPIO(PCMCIA_S0_RDYINT), IRQ_TYPE_NONE);
set_irq_type(IRQ_TO_GPIO(PCMCIA_S1_RDYINT), IRQ_TYPE_NONE);
gpio_free(GPIO_PCMCIA_RESET);
}
static void cmx270_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
struct pcmcia_state *state)
{
state->detect = (PCC_DETECT(skt->nr) == 0) ? 1 : 0;
state->ready = (PCC_READY(skt->nr) == 0) ? 0 : 1;
state->detect = (gpio_get_value(GPIO_PCMCIA_S0_CD_VALID) == 0) ? 1 : 0;
state->ready = (gpio_get_value(GPIO_PCMCIA_S0_RDYINT) == 0) ? 0 : 1;
state->bvd1 = 1;
state->bvd2 = 1;
state->vs_3v = 0;
@ -93,32 +70,16 @@ static void cmx270_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
static int cmx270_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
const socket_state_t *state)
{
GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
pxa_gpio_mode(GPIO49_nPWE | GPIO_OUT);
switch (skt->nr) {
case 0:
if (state->flags & SS_RESET) {
GPCR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
GPSR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
gpio_set_value(GPIO_PCMCIA_RESET, 1);
udelay(10);
GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
}
break;
case 1:
if (state->flags & SS_RESET) {
GPCR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
GPSR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
udelay(10);
GPCR(GPIO53_nPCE_2) = GPIO_bit(GPIO53_nPCE_2);
GPSR(GPIO49_nPWE) = GPIO_bit(GPIO49_nPWE);
gpio_set_value(GPIO_PCMCIA_RESET, 0);
}
break;
}
pxa_gpio_mode(GPIO49_nPWE_MD);
return 0;
}
@ -139,7 +100,7 @@ static struct pcmcia_low_level cmx270_pcmcia_ops __initdata = {
.configure_socket = cmx270_pcmcia_configure_socket,
.socket_init = cmx270_pcmcia_socket_init,
.socket_suspend = cmx270_pcmcia_socket_suspend,
.nr = 2,
.nr = 1,
};
static struct platform_device *cmx270_pcmcia_device;