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KVM: Lazy FPU support for SVM
Avoid saving and restoring the guest fpu state on every exit. This shaves ~100 cycles off the guest/host switch. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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parent
4c690a1e86
commit
7807fa6ca5
2 changed files with 33 additions and 4 deletions
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@ -63,6 +63,7 @@
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#define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN)
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#define DE_VECTOR 0
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#define NM_VECTOR 7
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#define DF_VECTOR 8
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#define TS_VECTOR 10
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#define NP_VECTOR 11
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@ -301,6 +302,7 @@ struct kvm_vcpu {
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char fx_buf[FX_BUF_SIZE];
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char *host_fx_image;
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char *guest_fx_image;
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int fpu_active;
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int mmio_needed;
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int mmio_read_completed;
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@ -587,6 +587,7 @@ static int svm_create_vcpu(struct kvm_vcpu *vcpu)
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init_vmcb(vcpu->svm->vmcb);
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fx_init(vcpu);
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vcpu->fpu_active = 1;
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vcpu->apic_base = 0xfee00000 |
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/*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
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MSR_IA32_APICBASE_ENABLE;
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@ -756,6 +757,11 @@ static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
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}
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}
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#endif
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if ((vcpu->cr0 & CR0_TS_MASK) && !(cr0 & CR0_TS_MASK)) {
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vcpu->svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR);
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vcpu->fpu_active = 1;
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}
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vcpu->cr0 = cr0;
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cr0 |= CR0_PG_MASK | CR0_WP_MASK;
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cr0 &= ~(CR0_CD_MASK | CR0_NW_MASK);
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@ -928,6 +934,16 @@ static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
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return 0;
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}
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static int nm_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
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{
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vcpu->svm->vmcb->control.intercept_exceptions &= ~(1 << NM_VECTOR);
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if (!(vcpu->cr0 & CR0_TS_MASK))
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vcpu->svm->vmcb->save.cr0 &= ~CR0_TS_MASK;
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vcpu->fpu_active = 1;
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return 1;
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}
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static int shutdown_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
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{
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/*
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@ -1292,6 +1308,7 @@ static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
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[SVM_EXIT_WRITE_DR5] = emulate_on_interception,
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[SVM_EXIT_WRITE_DR7] = emulate_on_interception,
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[SVM_EXIT_EXCP_BASE + PF_VECTOR] = pf_interception,
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[SVM_EXIT_EXCP_BASE + NM_VECTOR] = nm_interception,
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[SVM_EXIT_INTR] = nop_on_interception,
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[SVM_EXIT_NMI] = nop_on_interception,
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[SVM_EXIT_SMI] = nop_on_interception,
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@ -1481,8 +1498,10 @@ static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
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load_db_regs(vcpu->svm->db_regs);
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}
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fx_save(vcpu->host_fx_image);
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fx_restore(vcpu->guest_fx_image);
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if (vcpu->fpu_active) {
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fx_save(vcpu->host_fx_image);
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fx_restore(vcpu->guest_fx_image);
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}
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asm volatile (
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#ifdef CONFIG_X86_64
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@ -1593,8 +1612,10 @@ static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
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#endif
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: "cc", "memory" );
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fx_save(vcpu->guest_fx_image);
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fx_restore(vcpu->host_fx_image);
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if (vcpu->fpu_active) {
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fx_save(vcpu->guest_fx_image);
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fx_restore(vcpu->host_fx_image);
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}
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if ((vcpu->svm->vmcb->save.dr7 & 0xff))
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load_db_regs(vcpu->svm->host_db_regs);
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@ -1664,6 +1685,12 @@ static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
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{
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vcpu->svm->vmcb->save.cr3 = root;
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force_new_asid(vcpu);
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if (vcpu->fpu_active) {
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vcpu->svm->vmcb->control.intercept_exceptions |= (1 << NM_VECTOR);
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vcpu->svm->vmcb->save.cr0 |= CR0_TS_MASK;
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vcpu->fpu_active = 0;
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}
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}
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static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
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