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drm/i915/mpllb: move mpllb state check to intel_snps_phy.c
Keep the mpllb implementation details together in intel_snps_phy.c. Also declutter intel_display.c. v2: intel_mpllb_verify_state -> void intel_mpllb_state_verify (Ville) Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/e7340bb0e399aeb2676c4820461187eeb1d4db15.1655372759.git.jani.nikula@intel.com
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parent
109406c92f
commit
781c336a6c
3 changed files with 48 additions and 46 deletions
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@ -6582,50 +6582,6 @@ intel_verify_planes(struct intel_atomic_state *state)
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plane_state->uapi.visible);
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}
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static void
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verify_mpllb_state(struct intel_atomic_state *state,
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struct intel_crtc_state *new_crtc_state)
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{
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struct drm_i915_private *i915 = to_i915(state->base.dev);
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struct intel_mpllb_state mpllb_hw_state = { 0 };
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struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->mpllb_state;
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struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
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struct intel_encoder *encoder;
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if (!IS_DG2(i915))
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return;
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if (!new_crtc_state->hw.active)
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return;
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encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
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intel_mpllb_readout_hw_state(encoder, &mpllb_hw_state);
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#define MPLLB_CHECK(__name) \
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I915_STATE_WARN(mpllb_sw_state->__name != mpllb_hw_state.__name, \
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"[CRTC:%d:%s] mismatch in MPLLB: %s (expected 0x%08x, found 0x%08x)", \
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crtc->base.base.id, crtc->base.name, \
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__stringify(__name), \
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mpllb_sw_state->__name, mpllb_hw_state.__name)
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MPLLB_CHECK(mpllb_cp);
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MPLLB_CHECK(mpllb_div);
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MPLLB_CHECK(mpllb_div2);
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MPLLB_CHECK(mpllb_fracn1);
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MPLLB_CHECK(mpllb_fracn2);
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MPLLB_CHECK(mpllb_sscen);
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MPLLB_CHECK(mpllb_sscstep);
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/*
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* ref_control is handled by the hardware/firemware and never
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* programmed by the software, but the proper values are supplied
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* in the bspec for verification purposes.
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*/
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MPLLB_CHECK(ref_control);
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#undef MPLLB_CHECK
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}
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static void
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intel_modeset_verify_crtc(struct intel_crtc *crtc,
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struct intel_atomic_state *state,
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@ -6639,7 +6595,7 @@ intel_modeset_verify_crtc(struct intel_crtc *crtc,
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verify_connector_state(state, crtc);
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verify_crtc_state(crtc, old_crtc_state, new_crtc_state);
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intel_shared_dpll_state_verify(crtc, old_crtc_state, new_crtc_state);
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verify_mpllb_state(state, new_crtc_state);
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intel_mpllb_state_verify(state, new_crtc_state);
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}
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static void
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@ -813,3 +813,46 @@ int intel_snps_phy_check_hdmi_link_rate(int clock)
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return MODE_CLOCK_RANGE;
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}
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void intel_mpllb_state_verify(struct intel_atomic_state *state,
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struct intel_crtc_state *new_crtc_state)
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{
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struct drm_i915_private *i915 = to_i915(state->base.dev);
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struct intel_mpllb_state mpllb_hw_state = { 0 };
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struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->mpllb_state;
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struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
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struct intel_encoder *encoder;
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if (!IS_DG2(i915))
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return;
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if (!new_crtc_state->hw.active)
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return;
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encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
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intel_mpllb_readout_hw_state(encoder, &mpllb_hw_state);
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#define MPLLB_CHECK(__name) \
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I915_STATE_WARN(mpllb_sw_state->__name != mpllb_hw_state.__name, \
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"[CRTC:%d:%s] mismatch in MPLLB: %s (expected 0x%08x, found 0x%08x)", \
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crtc->base.base.id, crtc->base.name, \
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__stringify(__name), \
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mpllb_sw_state->__name, mpllb_hw_state.__name)
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MPLLB_CHECK(mpllb_cp);
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MPLLB_CHECK(mpllb_div);
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MPLLB_CHECK(mpllb_div2);
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MPLLB_CHECK(mpllb_fracn1);
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MPLLB_CHECK(mpllb_fracn2);
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MPLLB_CHECK(mpllb_sscen);
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MPLLB_CHECK(mpllb_sscstep);
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/*
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* ref_control is handled by the hardware/firemware and never
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* programmed by the software, but the proper values are supplied
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* in the bspec for verification purposes.
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*/
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MPLLB_CHECK(ref_control);
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#undef MPLLB_CHECK
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}
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@ -9,8 +9,9 @@
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#include <linux/types.h>
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struct drm_i915_private;
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struct intel_encoder;
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struct intel_atomic_state;
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struct intel_crtc_state;
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struct intel_encoder;
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struct intel_mpllb_state;
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enum phy;
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@ -31,5 +32,7 @@ int intel_mpllb_calc_port_clock(struct intel_encoder *encoder,
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int intel_snps_phy_check_hdmi_link_rate(int clock);
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void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_mpllb_state_verify(struct intel_atomic_state *state,
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struct intel_crtc_state *new_crtc_state);
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#endif /* __INTEL_SNPS_PHY_H__ */
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