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sh_eth: fix *enum* {A|M}PR_BIT 

The *enum* {A|M}PR_BIT were declared in the commit 86a74ff21a ("net:
sh_eth: add support for  Renesas SuperH Ethernet") adding SH771x support,
however the SH771x manual  doesn't have the APR/MPR registers described
and the code writing to them for SH7710 was later removed by the commit
380af9e390 ("net: sh_eth: CPU dependency code collect to "struct
sh_eth_cpu_data""). All the newer SoC manuals have these registers
documented as having a 16-bit TIME parameter of the PAUSE frame, not
1-bit -- update the *enum* accordingly, fixing up the APR/MPR writes...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sergei Shtylyov 2018-06-26 18:42:33 +03:00 committed by David S. Miller
parent 5092ad4dd5
commit 782e85c5f7
2 changed files with 4 additions and 4 deletions
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4
drivers/net/ethernet/renesas/sh_eth.c
View File

@ -1521,9 +1521,9 @@ static int sh_eth_dev_init(struct net_device *ndev)
/* mask reset */
if (mdp->cd->apr)
sh_eth_write(ndev, APR_AP, APR);
sh_eth_write(ndev, 1, APR);
if (mdp->cd->mpr)
sh_eth_write(ndev, MPR_MP, MPR);
sh_eth_write(ndev, 1, MPR);
if (mdp->cd->tpauser)
sh_eth_write(ndev, TPAUSER_UNLIMITED, TPAUSER);

4
drivers/net/ethernet/renesas/sh_eth.h
View File

@ -383,12 +383,12 @@ enum ECSIPR_STATUS_MASK_BIT {
/* APR */
enum APR_BIT {
APR_AP = 0x00000001,
APR_AP = 0x0000ffff,
};
/* MPR */
enum MPR_BIT {
MPR_MP = 0x00000001,
MPR_MP = 0x0000ffff,
};
/* TRSCER */