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hwmon: (lis3) Add support for new LIS3DC / HP3DC chip
A new version of LIS3 chip has slight incompatibilities from former versions. This patch adds the minimal support for it. Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
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parent
9401ba1328
commit
78537c3b6f
2 changed files with 44 additions and 8 deletions
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@ -138,6 +138,7 @@ static void lis3lv02d_get_xyz(struct lis3lv02d *lis3, int *x, int *y, int *z)
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/* conversion btw sampling rate and the register values */
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static int lis3_12_rates[4] = {40, 160, 640, 2560};
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static int lis3_8_rates[2] = {100, 400};
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static int lis3_3dc_rates[16] = {0, 1, 10, 25, 50, 100, 200, 400, 1600, 5000};
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/* ODR is Output Data Rate */
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static int lis3lv02d_get_odr(void)
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@ -156,6 +157,9 @@ static int lis3lv02d_set_odr(int rate)
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u8 ctrl;
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int i, len, shift;
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if (!rate)
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return -EINVAL;
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lis3_dev.read(&lis3_dev, CTRL_REG1, &ctrl);
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ctrl &= ~lis3_dev.odr_mask;
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len = 1 << hweight_long(lis3_dev.odr_mask); /* # of possible values */
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@ -172,19 +176,25 @@ static int lis3lv02d_set_odr(int rate)
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static int lis3lv02d_selftest(struct lis3lv02d *lis3, s16 results[3])
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{
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u8 reg;
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u8 ctlreg, reg;
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s16 x, y, z;
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u8 selftest;
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int ret;
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mutex_lock(&lis3->mutex);
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if (lis3_dev.whoami == WAI_12B)
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selftest = CTRL1_ST;
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else
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selftest = CTRL1_STP;
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if (lis3_dev.whoami == WAI_3DC) {
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ctlreg = CTRL_REG4;
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selftest = CTRL4_ST0;
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} else {
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ctlreg = CTRL_REG1;
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if (lis3_dev.whoami == WAI_12B)
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selftest = CTRL1_ST;
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else
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selftest = CTRL1_STP;
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}
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lis3->read(lis3, CTRL_REG1, ®);
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lis3->write(lis3, CTRL_REG1, (reg | selftest));
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lis3->read(lis3, ctlreg, ®);
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lis3->write(lis3, ctlreg, (reg | selftest));
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msleep(lis3->pwron_delay / lis3lv02d_get_odr());
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/* Read directly to avoid axis remap */
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@ -193,7 +203,7 @@ static int lis3lv02d_selftest(struct lis3lv02d *lis3, s16 results[3])
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z = lis3->read_data(lis3, OUTZ);
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/* back to normal settings */
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lis3->write(lis3, CTRL_REG1, reg);
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lis3->write(lis3, ctlreg, reg);
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msleep(lis3->pwron_delay / lis3lv02d_get_odr());
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results[0] = x - lis3->read_data(lis3, OUTX);
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@ -674,6 +684,15 @@ int lis3lv02d_init_device(struct lis3lv02d *dev)
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dev->odr_mask = CTRL1_DR;
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dev->scale = LIS3_SENSITIVITY_8B;
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break;
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case WAI_3DC:
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printk(KERN_INFO DRIVER_NAME ": 8 bits 3DC sensor found\n");
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dev->read_data = lis3lv02d_read_8;
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dev->mdps_max_val = 128;
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dev->pwron_delay = LIS3_PWRON_DELAY_WAI_8B;
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dev->odrs = lis3_3dc_rates;
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dev->odr_mask = CTRL1_ODR0|CTRL1_ODR1|CTRL1_ODR2|CTRL1_ODR3;
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dev->scale = LIS3_SENSITIVITY_8B;
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break;
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default:
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printk(KERN_ERR DRIVER_NAME
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": unknown sensor type 0x%X\n", dev->whoami);
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@ -45,6 +45,7 @@ enum lis3_reg {
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CTRL_REG1 = 0x20,
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CTRL_REG2 = 0x21,
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CTRL_REG3 = 0x22,
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CTRL_REG4 = 0x23,
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HP_FILTER_RESET = 0x23,
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STATUS_REG = 0x27,
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OUTX_L = 0x28,
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@ -93,6 +94,7 @@ enum lis3lv02d_reg {
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};
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enum lis3_who_am_i {
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WAI_3DC = 0x33, /* 8 bits: LIS3DC, HP3DC */
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WAI_12B = 0x3A, /* 12 bits: LIS3LV02D[LQ]... */
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WAI_8B = 0x3B, /* 8 bits: LIS[23]02D[LQ]... */
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WAI_6B = 0x52, /* 6 bits: LIS331DLF - not supported */
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@ -118,6 +120,13 @@ enum lis3lv02d_ctrl1_8b {
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CTRL1_DR = 0x80,
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};
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enum lis3lv02d_ctrl1_3dc {
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CTRL1_ODR0 = 0x10,
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CTRL1_ODR1 = 0x20,
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CTRL1_ODR2 = 0x40,
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CTRL1_ODR3 = 0x80,
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};
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enum lis3lv02d_ctrl2 {
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CTRL2_DAS = 0x01,
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CTRL2_SIM = 0x02,
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@ -129,6 +138,14 @@ enum lis3lv02d_ctrl2 {
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CTRL2_FS = 0x80, /* Full Scale selection */
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};
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enum lis3lv02d_ctrl4_3dc {
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CTRL4_SIM = 0x01,
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CTRL4_ST0 = 0x02,
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CTRL4_ST1 = 0x04,
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CTRL4_FS0 = 0x10,
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CTRL4_FS1 = 0x20,
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};
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enum lis302d_ctrl2 {
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HP_FF_WU2 = 0x08,
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HP_FF_WU1 = 0x04,
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