arm64: dts: imx: Add i.MX8M Plus Gateworks gw7400 dts support
The Gateworks GW7400 is an ARM based single board computer (SBC) featuring: - i.MX8M Plus SoC - LPDDR4 DRAM - eMMC FLASH - Gateworks System Controller (GSC) - QOS GbE - Microchip GbE Switch - Multiple multi-protocol RS232/RS485/RS422 Serial ports - USB 3.0 Front panel connector - onboard 802.11ac WiFi / BT - 3x miniPCIe socket with PCIe and USB 2.0 - 1x M.2 B/A-E socket with PCIe, USB 3.0 and dual nano-SIM sockets - off-board connectors for: MIPI DSI, MIPI CSI, SPI, GPIO, I2C - Wide range DC power input - Passive PoE - 802.3at PoE Signed-off-by: Tim Harvey <tharvey@gateworks.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Tim Harvey
Shawn Guo
parent
b5f955c099
commit
7899eb6cb1
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@ -80,6 +80,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mn-venice-gw7902.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dev.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-wifi-dahlia.dtb
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@ -0,0 +1,896 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2021 Gateworks Corporation
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/leds/common.h>
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#include "imx8mp.dtsi"
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/ {
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model = "Gateworks Venice GW74xx i.MX8MP board";
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compatible = "gateworks,imx8mp-gw74xx", "fsl,imx8mp";
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aliases {
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ethernet0 = &eqos;
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ethernet1 = &fec;
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ethernet2 = &lan1;
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ethernet3 = &lan2;
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ethernet4 = &lan3;
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ethernet5 = &lan4;
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ethernet6 = &lan5;
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};
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chosen {
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stdout-path = &uart2;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x0 0x40000000 0 0x80000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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key-0 {
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label = "user_pb";
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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};
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key-1 {
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label = "user_pb1x";
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linux,code = <BTN_1>;
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interrupt-parent = <&gsc>;
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interrupts = <0>;
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};
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key-2 {
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label = "key_erased";
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linux,code = <BTN_2>;
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interrupt-parent = <&gsc>;
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interrupts = <1>;
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};
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key-3 {
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label = "eeprom_wp";
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linux,code = <BTN_3>;
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interrupt-parent = <&gsc>;
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interrupts = <2>;
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};
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key-4 {
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label = "tamper";
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linux,code = <BTN_4>;
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interrupt-parent = <&gsc>;
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interrupts = <5>;
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};
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key-5 {
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label = "switch_hold";
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linux,code = <BTN_5>;
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interrupt-parent = <&gsc>;
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interrupts = <7>;
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};
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};
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led-controller {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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led-0 {
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function = LED_FUNCTION_HEARTBEAT;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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led-1 {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_RED>;
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gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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pps {
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compatible = "pps-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pps>;
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gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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};
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reg_usb2_vbus: regulator-usb2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_usb2>;
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compatible = "regulator-fixed";
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regulator-name = "usb_usb2_vbus";
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gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_can2_stby: regulator-can2-stby {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_can>;
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regulator-name = "can2_stby";
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gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_wifi_en: regulator-wifi-en {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_wifi>;
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compatible = "regulator-fixed";
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regulator-name = "wl";
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gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <100>;
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enable-active-high;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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/* off-board header */
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi2>;
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cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&eqos {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_eqos>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy0>;
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status = "okay";
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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};
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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phy-mode = "rgmii-id";
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local-mac-address = [00 00 00 00 00 00];
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status = "okay";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&flexcan2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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xceiver-supply = <®_can2_stby>;
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status = "okay";
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};
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&gpio1 {
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gpio-line-names =
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"", "", "", "", "", "", "", "",
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"", "", "dio0", "", "dio1", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&gpio2 {
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gpio-line-names =
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"pcie3_wdis#", "", "", "pcie1_wdis@", "pcie2_wdis#", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&gpio3 {
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gpio-line-names =
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"m2_gdis#", "", "", "", "", "", "", "m2_rst#",
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"", "", "", "", "", "", "", "",
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"m2_off#", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&gpio4 {
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gpio-line-names =
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "m2_wdis#", "", "", "",
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"", "", "", "", "", "", "", "uart_rs485";
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};
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&gpio5 {
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gpio-line-names =
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"uart_half", "uart_term", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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gsc: gsc@20 {
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compatible = "gw,gsc";
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reg = <0x20>;
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pinctrl-0 = <&pinctrl_gsc>;
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interrupt-parent = <&gpio4>;
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interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <1>;
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adc {
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compatible = "gw,gsc-adc";
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#address-cells = <1>;
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#size-cells = <0>;
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channel@6 {
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gw,mode = <0>;
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reg = <0x06>;
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label = "temp";
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};
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channel@8 {
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gw,mode = <1>;
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reg = <0x08>;
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label = "vdd_bat";
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};
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channel@82 {
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gw,mode = <2>;
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reg = <0x82>;
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label = "vdd_adc1";
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gw,voltage-divider-ohms = <10000 10000>;
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};
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channel@84 {
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gw,mode = <2>;
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reg = <0x84>;
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label = "vdd_adc2";
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gw,voltage-divider-ohms = <10000 10000>;
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};
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channel@86 {
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gw,mode = <2>;
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reg = <0x86>;
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label = "vdd_vin";
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gw,voltage-divider-ohms = <22100 1000>;
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};
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channel@88 {
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gw,mode = <2>;
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reg = <0x88>;
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label = "vdd_3p3";
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gw,voltage-divider-ohms = <10000 10000>;
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};
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channel@8c {
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gw,mode = <2>;
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reg = <0x8c>;
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label = "vdd_2p5";
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gw,voltage-divider-ohms = <10000 10000>;
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};
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channel@90 {
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gw,mode = <2>;
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reg = <0x90>;
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label = "vdd_soc";
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};
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channel@92 {
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gw,mode = <2>;
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reg = <0x92>;
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label = "vdd_arm";
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};
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channel@98 {
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gw,mode = <2>;
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reg = <0x98>;
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label = "vdd_1p8";
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};
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channel@9a {
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gw,mode = <2>;
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reg = <0x9a>;
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label = "vdd_1p2";
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};
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channel@9c {
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gw,mode = <2>;
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reg = <0x9c>;
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label = "vdd_dram";
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};
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channel@a2 {
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gw,mode = <2>;
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reg = <0xa2>;
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label = "vdd_gsc";
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gw,voltage-divider-ohms = <10000 10000>;
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};
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};
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};
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gpio: gpio@23 {
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compatible = "nxp,pca9555";
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reg = <0x23>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gsc>;
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interrupts = <4>;
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};
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pmic@25 {
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compatible = "nxp,pca9450c";
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reg = <0x25>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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interrupt-parent = <&gpio3>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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regulators {
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BUCK1 {
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regulator-name = "BUCK1";
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regulator-min-microvolt = <720000>;
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regulator-max-microvolt = <1000000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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};
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BUCK2 {
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regulator-name = "BUCK2";
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regulator-min-microvolt = <720000>;
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regulator-max-microvolt = <1025000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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nxp,dvs-run-voltage = <950000>;
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nxp,dvs-standby-voltage = <850000>;
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};
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BUCK4 {
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regulator-name = "BUCK4";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3600000>;
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regulator-boot-on;
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regulator-always-on;
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};
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BUCK5 {
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regulator-name = "BUCK5";
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regulator-min-microvolt = <1650000>;
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regulator-max-microvolt = <1950000>;
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regulator-boot-on;
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regulator-always-on;
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};
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BUCK6 {
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regulator-name = "BUCK6";
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regulator-min-microvolt = <1045000>;
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regulator-max-microvolt = <1155000>;
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regulator-boot-on;
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regulator-always-on;
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};
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LDO1 {
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regulator-name = "LDO1";
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regulator-min-microvolt = <1650000>;
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regulator-max-microvolt = <1950000>;
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regulator-boot-on;
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regulator-always-on;
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};
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LDO3 {
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regulator-name = "LDO3";
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regulator-min-microvolt = <1710000>;
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regulator-max-microvolt = <1890000>;
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regulator-boot-on;
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regulator-always-on;
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};
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LDO5 {
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regulator-name = "LDO5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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};
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eeprom@50 {
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compatible = "atmel,24c02";
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reg = <0x50>;
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pagesize = <16>;
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};
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eeprom@51 {
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compatible = "atmel,24c02";
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reg = <0x51>;
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pagesize = <16>;
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};
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eeprom@52 {
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compatible = "atmel,24c02";
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reg = <0x52>;
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pagesize = <16>;
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};
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eeprom@53 {
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compatible = "atmel,24c02";
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reg = <0x53>;
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pagesize = <16>;
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};
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rtc@68 {
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compatible = "dallas,ds1672";
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reg = <0x68>;
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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accelerometer@19 {
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compatible = "st,lis2de12";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_accel>;
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reg = <0x19>;
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st,drdy-int-pin = <1>;
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interrupt-parent = <&gpio1>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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interrupt-names = "INT1";
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};
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switch: switch@5f {
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compatible = "microchip,ksz9897";
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reg = <0x5f>;
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pinctrl-0 = <&pinctrl_ksz>;
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interrupt-parent = <&gpio4>;
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interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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|
||||
lan1: port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
lan2: port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
lan3: port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
lan4: port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
lan5: port@4 {
|
||||
reg = <4>;
|
||||
label = "lan5";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <&fec>;
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* off-board header */
|
||||
&i2c4 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* GPS / off-board header */
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* RS232 console */
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB1 - Type C front panel */
|
||||
&usb3_phy0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_0 {
|
||||
fsl,over-current-active-low;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_0 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USB2 - USB3.0 Hub */
|
||||
&usb3_phy1 {
|
||||
vbus-supply = <®_usb2_vbus>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_1 {
|
||||
fsl,permanently-attached;
|
||||
fsl,disable-port-power-control;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3_1 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&usdhc3 {
|
||||
assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
|
||||
assigned-clock-rates = <400000000>;
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc3>;
|
||||
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdog1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdog>;
|
||||
fsl,ext-reset-output;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_hog>;
|
||||
|
||||
pinctrl_hog: hoggrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09 0x40000041 /* DIO0 */
|
||||
MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11 0x40000041 /* DIO1 */
|
||||
MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14 0x40000041 /* M2SKT_OFF# */
|
||||
MX8MP_IOMUXC_SD2_DATA2__GPIO2_IO17 0x40000159 /* PCIE1_WDIS# */
|
||||
MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18 0x40000159 /* PCIE2_WDIS# */
|
||||
MX8MP_IOMUXC_SD2_CMD__GPIO2_IO14 0x40000159 /* PCIE3_WDIS# */
|
||||
MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06 0x40000041 /* M2SKT_RST# */
|
||||
MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x40000159 /* M2SKT_WDIS# */
|
||||
MX8MP_IOMUXC_NAND_ALE__GPIO3_IO00 0x40000159 /* M2SKT_GDIS# */
|
||||
MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x40000104 /* UART_TERM */
|
||||
MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31 0x40000104 /* UART_RS485 */
|
||||
MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00 0x40000104 /* UART_HALF */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_accel: accelgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_eqos: eqosgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3
|
||||
MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3
|
||||
MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91
|
||||
MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91
|
||||
MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91
|
||||
MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91
|
||||
MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91
|
||||
MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91
|
||||
MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f
|
||||
MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f
|
||||
MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x1f
|
||||
MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x1f
|
||||
MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f
|
||||
MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f
|
||||
MX8MP_IOMUXC_SAI3_RXD__GPIO4_IO30 0x141 /* RST# */
|
||||
MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x159 /* IRQ# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_fec: fecgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91
|
||||
MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91
|
||||
MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91
|
||||
MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91
|
||||
MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91
|
||||
MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91
|
||||
MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x1f
|
||||
MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x1f
|
||||
MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x1f
|
||||
MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x1f
|
||||
MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x1f
|
||||
MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x1f
|
||||
MX8MP_IOMUXC_SAI1_RXFS__ENET1_1588_EVENT0_IN 0x141
|
||||
MX8MP_IOMUXC_SAI1_RXC__ENET1_1588_EVENT0_OUT 0x141
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexcan2: flexcan2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX 0x154
|
||||
MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX 0x154
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gsc: gscgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c1: i2c1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3
|
||||
MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c3
|
||||
MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c3
|
||||
MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c4: i2c4grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c3
|
||||
MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ksz: kszgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x159 /* IRQ# */
|
||||
MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02 0x141 /* RST# */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: ledgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_DATA0__GPIO2_IO15 0x19
|
||||
MX8MP_IOMUXC_SD2_DATA1__GPIO2_IO16 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pmic: pmicgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07 0x141
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pps: ppsgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x141
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_can: regcangrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19 0x154
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_usb2: regusb2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x141
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_reg_wifi: regwifigrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_DATA03__GPIO3_IO09 0x119
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_sai2: sai2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC
|
||||
MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00
|
||||
MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK
|
||||
MX8MP_IOMUXC_SAI2_MCLK__AUDIOMIX_SAI2_MCLK
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spi2: spi2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82
|
||||
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82
|
||||
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82
|
||||
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140
|
||||
MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140
|
||||
MX8MP_IOMUXC_SAI5_RXD1__GPIO3_IO22 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3_gpio: uart3gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_DATA02__GPIO3_IO08 0x119
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart4: uart4grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140
|
||||
MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usb1: usb1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140
|
||||
MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID 0x140
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1: usdhc1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3: usdhc3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
|
||||
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
|
||||
MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166
|
||||
>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue