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ata: move sata_link_hardreset() to libata-sata.c
* move sata_link_hardreset() to libata-sata.c * add static inline for CONFIG_SATA_HOST=n case * make sata_set_spd_needed() static Code size savings on m68k arch using (modified) atari_defconfig: text data bss dec hex filename before: 32724 572 40 33336 8238 drivers/ata/libata-core.o after: 32559 572 40 33171 8193 drivers/ata/libata-core.o Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
This commit is contained in:
Bartlomiej Zolnierkiewicz
Jens Axboe
parent
9d3158f5cb
commit
78c97c80d7
4 changed files with 127 additions and 124 deletions
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@ -3531,119 +3531,6 @@ int ata_std_prereset(struct ata_link *link, unsigned long deadline)
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}
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EXPORT_SYMBOL_GPL(ata_std_prereset);
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/**
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* sata_link_hardreset - reset link via SATA phy reset
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* @link: link to reset
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* @timing: timing parameters { interval, duration, timeout } in msec
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* @deadline: deadline jiffies for the operation
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* @online: optional out parameter indicating link onlineness
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* @check_ready: optional callback to check link readiness
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*
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* SATA phy-reset @link using DET bits of SControl register.
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* After hardreset, link readiness is waited upon using
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* ata_wait_ready() if @check_ready is specified. LLDs are
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* allowed to not specify @check_ready and wait itself after this
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* function returns. Device classification is LLD's
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* responsibility.
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*
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* *@online is set to one iff reset succeeded and @link is online
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* after reset.
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*
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* LOCKING:
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* Kernel thread context (may sleep)
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*
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* RETURNS:
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* 0 on success, -errno otherwise.
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*/
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int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
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unsigned long deadline,
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bool *online, int (*check_ready)(struct ata_link *))
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{
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u32 scontrol;
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int rc;
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DPRINTK("ENTER\n");
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if (online)
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*online = false;
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if (sata_set_spd_needed(link)) {
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/* SATA spec says nothing about how to reconfigure
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* spd. To be on the safe side, turn off phy during
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* reconfiguration. This works for at least ICH7 AHCI
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* and Sil3124.
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*/
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if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
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goto out;
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scontrol = (scontrol & 0x0f0) | 0x304;
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if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
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goto out;
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sata_set_spd(link);
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}
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/* issue phy wake/reset */
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if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
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goto out;
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scontrol = (scontrol & 0x0f0) | 0x301;
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if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
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goto out;
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/* Couldn't find anything in SATA I/II specs, but AHCI-1.1
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* 10.4.2 says at least 1 ms.
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*/
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ata_msleep(link->ap, 1);
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/* bring link back */
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rc = sata_link_resume(link, timing, deadline);
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if (rc)
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goto out;
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/* if link is offline nothing more to do */
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if (ata_phys_link_offline(link))
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goto out;
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/* Link is online. From this point, -ENODEV too is an error. */
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if (online)
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*online = true;
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if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) {
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/* If PMP is supported, we have to do follow-up SRST.
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* Some PMPs don't send D2H Reg FIS after hardreset if
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* the first port is empty. Wait only for
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* ATA_TMOUT_PMP_SRST_WAIT.
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*/
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if (check_ready) {
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unsigned long pmp_deadline;
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pmp_deadline = ata_deadline(jiffies,
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ATA_TMOUT_PMP_SRST_WAIT);
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if (time_after(pmp_deadline, deadline))
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pmp_deadline = deadline;
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ata_wait_ready(link, pmp_deadline, check_ready);
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}
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rc = -EAGAIN;
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goto out;
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}
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rc = 0;
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if (check_ready)
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rc = ata_wait_ready(link, deadline, check_ready);
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out:
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if (rc && rc != -EAGAIN) {
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/* online is set iff link is online && reset succeeded */
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if (online)
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*online = false;
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ata_link_err(link, "COMRESET failed (errno=%d)\n", rc);
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}
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DPRINTK("EXIT, rc=%d\n", rc);
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return rc;
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}
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EXPORT_SYMBOL_GPL(sata_link_hardreset);
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/**
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* sata_std_hardreset - COMRESET w/o waiting or classification
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* @link: link to reset
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@ -449,7 +449,7 @@ static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
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* RETURNS:
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* 1 if SATA spd configuration is needed, 0 otherwise.
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*/
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int sata_set_spd_needed(struct ata_link *link)
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static int sata_set_spd_needed(struct ata_link *link)
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{
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u32 scontrol;
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@ -490,6 +490,119 @@ int sata_set_spd(struct ata_link *link)
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}
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EXPORT_SYMBOL_GPL(sata_set_spd);
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/**
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* sata_link_hardreset - reset link via SATA phy reset
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* @link: link to reset
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* @timing: timing parameters { interval, duration, timeout } in msec
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* @deadline: deadline jiffies for the operation
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* @online: optional out parameter indicating link onlineness
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* @check_ready: optional callback to check link readiness
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*
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* SATA phy-reset @link using DET bits of SControl register.
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* After hardreset, link readiness is waited upon using
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* ata_wait_ready() if @check_ready is specified. LLDs are
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* allowed to not specify @check_ready and wait itself after this
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* function returns. Device classification is LLD's
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* responsibility.
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*
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* *@online is set to one iff reset succeeded and @link is online
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* after reset.
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*
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* LOCKING:
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* Kernel thread context (may sleep)
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*
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* RETURNS:
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* 0 on success, -errno otherwise.
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*/
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int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
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unsigned long deadline,
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bool *online, int (*check_ready)(struct ata_link *))
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{
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u32 scontrol;
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int rc;
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DPRINTK("ENTER\n");
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if (online)
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*online = false;
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if (sata_set_spd_needed(link)) {
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/* SATA spec says nothing about how to reconfigure
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* spd. To be on the safe side, turn off phy during
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* reconfiguration. This works for at least ICH7 AHCI
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* and Sil3124.
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*/
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if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
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goto out;
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scontrol = (scontrol & 0x0f0) | 0x304;
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if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
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goto out;
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sata_set_spd(link);
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}
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/* issue phy wake/reset */
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if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
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goto out;
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scontrol = (scontrol & 0x0f0) | 0x301;
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if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
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goto out;
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/* Couldn't find anything in SATA I/II specs, but AHCI-1.1
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* 10.4.2 says at least 1 ms.
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*/
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ata_msleep(link->ap, 1);
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/* bring link back */
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rc = sata_link_resume(link, timing, deadline);
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if (rc)
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goto out;
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/* if link is offline nothing more to do */
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if (ata_phys_link_offline(link))
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goto out;
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/* Link is online. From this point, -ENODEV too is an error. */
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if (online)
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*online = true;
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if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) {
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/* If PMP is supported, we have to do follow-up SRST.
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* Some PMPs don't send D2H Reg FIS after hardreset if
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* the first port is empty. Wait only for
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* ATA_TMOUT_PMP_SRST_WAIT.
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*/
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if (check_ready) {
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unsigned long pmp_deadline;
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pmp_deadline = ata_deadline(jiffies,
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ATA_TMOUT_PMP_SRST_WAIT);
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if (time_after(pmp_deadline, deadline))
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pmp_deadline = deadline;
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ata_wait_ready(link, pmp_deadline, check_ready);
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}
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rc = -EAGAIN;
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goto out;
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}
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rc = 0;
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if (check_ready)
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rc = ata_wait_ready(link, deadline, check_ready);
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out:
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if (rc && rc != -EAGAIN) {
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/* online is set iff link is online && reset succeeded */
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if (online)
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*online = false;
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ata_link_err(link, "COMRESET failed (errno=%d)\n", rc);
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}
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DPRINTK("EXIT, rc=%d\n", rc);
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return rc;
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}
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EXPORT_SYMBOL_GPL(sata_link_hardreset);
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/**
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* ata_slave_link_init - initialize slave link
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* @ap: port to initialize slave link for
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@ -87,13 +87,6 @@ extern unsigned int ata_read_log_page(struct ata_device *dev, u8 log,
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#define to_ata_port(d) container_of(d, struct ata_port, tdev)
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/* libata-sata.c */
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#ifdef CONFIG_SATA_HOST
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int sata_set_spd_needed(struct ata_link *link);
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#else
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static inline int sata_set_spd_needed(struct ata_link *link) { return 1; }
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#endif
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/* libata-acpi.c */
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#ifdef CONFIG_ATA_ACPI
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extern unsigned int ata_acpi_gtf_filter;
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@ -1077,9 +1077,6 @@ static inline int ata_port_is_dummy(struct ata_port *ap)
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extern int ata_std_prereset(struct ata_link *link, unsigned long deadline);
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extern int ata_wait_after_reset(struct ata_link *link, unsigned long deadline,
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int (*check_ready)(struct ata_link *link));
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extern int sata_link_hardreset(struct ata_link *link,
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const unsigned long *timing, unsigned long deadline,
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bool *online, int (*check_ready)(struct ata_link *));
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extern int sata_std_hardreset(struct ata_link *link, unsigned int *class,
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unsigned long deadline);
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extern void ata_std_postreset(struct ata_link *link, unsigned int *classes);
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@ -1190,6 +1187,9 @@ extern int sata_scr_read(struct ata_link *link, int reg, u32 *val);
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extern int sata_scr_write(struct ata_link *link, int reg, u32 val);
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extern int sata_scr_write_flush(struct ata_link *link, int reg, u32 val);
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extern int sata_set_spd(struct ata_link *link);
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extern int sata_link_hardreset(struct ata_link *link,
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const unsigned long *timing, unsigned long deadline,
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bool *online, int (*check_ready)(struct ata_link *));
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extern int sata_link_resume(struct ata_link *link, const unsigned long *params,
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unsigned long deadline);
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#else
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@ -1207,6 +1207,16 @@ static inline int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
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return -EOPNOTSUPP;
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}
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static inline int sata_set_spd(struct ata_link *link) { return -EOPNOTSUPP; }
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static inline int sata_link_hardreset(struct ata_link *link,
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const unsigned long *timing,
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unsigned long deadline,
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bool *online,
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int (*check_ready)(struct ata_link *))
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{
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if (online)
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*online = false;
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return -EOPNOTSUPP;
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}
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static inline int sata_link_resume(struct ata_link *link,
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const unsigned long *params,
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unsigned long deadline)
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