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powerpc/fsl-booke: Move loadcam_entry back to asm code to fix SMP ftrace
When we build with ftrace enabled its possible that loadcam_entry would have used the stack pointer (even though the code doesn't need it). We call loadcam_entry in __secondary_start before the stack is setup. To ensure that loadcam_entry doesn't use the stack pointer the easiest solution is to just have it in asm code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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78e2e68a2b
commit
78f622377f
4 changed files with 47 additions and 22 deletions
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@ -448,6 +448,14 @@ int main(void)
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DEFINE(PGD_T_LOG2, PGD_T_LOG2);
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DEFINE(PTE_T_LOG2, PTE_T_LOG2);
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#endif
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#ifdef CONFIG_FSL_BOOKE
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DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
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DEFINE(TLBCAM_MAS0, offsetof(struct tlbcam, MAS0));
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DEFINE(TLBCAM_MAS1, offsetof(struct tlbcam, MAS1));
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DEFINE(TLBCAM_MAS2, offsetof(struct tlbcam, MAS2));
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DEFINE(TLBCAM_MAS3, offsetof(struct tlbcam, MAS3));
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DEFINE(TLBCAM_MAS7, offsetof(struct tlbcam, MAS7));
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#endif
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#ifdef CONFIG_KVM_EXIT_TIMING
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DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
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@ -2,7 +2,7 @@
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* Modifications by Kumar Gala (galak@kernel.crashing.org) to support
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* E500 Book E processors.
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*
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* Copyright 2004 Freescale Semiconductor, Inc
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* Copyright 2004,2010 Freescale Semiconductor, Inc.
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*
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* This file contains the routines for initializing the MMU
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* on the 4xx series of chips.
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@ -56,19 +56,13 @@
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unsigned int tlbcam_index;
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#define NUM_TLBCAMS (64)
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#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
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#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
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#endif
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struct tlbcam {
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u32 MAS0;
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u32 MAS1;
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unsigned long MAS2;
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u32 MAS3;
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u32 MAS7;
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} TLBCAM[NUM_TLBCAMS];
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#define NUM_TLBCAMS (64)
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struct tlbcam TLBCAM[NUM_TLBCAMS];
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struct tlbcamrange {
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unsigned long start;
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@ -109,19 +103,6 @@ unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
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return 0;
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}
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void loadcam_entry(int idx)
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{
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mtspr(SPRN_MAS0, TLBCAM[idx].MAS0);
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mtspr(SPRN_MAS1, TLBCAM[idx].MAS1);
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mtspr(SPRN_MAS2, TLBCAM[idx].MAS2);
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mtspr(SPRN_MAS3, TLBCAM[idx].MAS3);
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if (mmu_has_feature(MMU_FTR_BIG_PHYS))
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mtspr(SPRN_MAS7, TLBCAM[idx].MAS7);
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asm volatile("isync;tlbwe;isync" : : : "memory");
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}
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/*
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* Set up one of the I/D BAT (block address translation) register pairs.
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* The parameters are not checked; in particular size must be a power
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@ -144,7 +144,15 @@ extern unsigned long mmu_mapin_ram(unsigned long top);
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extern void MMU_init_hw(void);
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extern unsigned long mmu_mapin_ram(unsigned long top);
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extern void adjust_total_lowmem(void);
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extern void loadcam_entry(unsigned int index);
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struct tlbcam {
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u32 MAS0;
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u32 MAS1;
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unsigned long MAS2;
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u32 MAS3;
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u32 MAS7;
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};
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#elif defined(CONFIG_PPC32)
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/* anything 32-bit except 4xx or 8xx */
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extern void MMU_init_hw(void);
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@ -365,3 +365,31 @@ _GLOBAL(set_context)
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#else
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#error Unsupported processor type !
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#endif
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#if defined(CONFIG_FSL_BOOKE)
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/*
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* extern void loadcam_entry(unsigned int index)
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*
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* Load TLBCAM[index] entry in to the L2 CAM MMU
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*/
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_GLOBAL(loadcam_entry)
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LOAD_REG_ADDR(r4, TLBCAM)
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mulli r5,r3,TLBCAM_SIZE
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add r3,r5,r4
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lwz r4,TLBCAM_MAS0(r3)
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mtspr SPRN_MAS0,r4
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lwz r4,TLBCAM_MAS1(r3)
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mtspr SPRN_MAS1,r4
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PPC_LL r4,TLBCAM_MAS2(r3)
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mtspr SPRN_MAS2,r4
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lwz r4,TLBCAM_MAS3(r3)
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mtspr SPRN_MAS3,r4
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BEGIN_MMU_FTR_SECTION
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lwz r4,TLBCAM_MAS7(r3)
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mtspr SPRN_MAS7,r4
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END_MMU_FTR_SECTION_IFSET(MMU_FTR_BIG_PHYS)
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isync
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tlbwe
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isync
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blr
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#endif
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