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phy: freescale: imx8m-pcie: fix pcie link-up instability
[ Upstream commit3a161017f1
] Leaving AUX_PLL_REFCLK_SEL at its reset default of AUX_IN (PLL clock) proves to be more stable on the i.MX 8M Mini. Fixes:1aa97b0022
("phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver") Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com> Link: https://lore.kernel.org/r/20240322130646.1016630-2-marcel@ziswiler.com Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 4 additions and 2 deletions
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@ -110,8 +110,10 @@ static int imx8_pcie_phy_power_on(struct phy *phy)
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/* Source clock from SoC internal PLL */
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writel(ANA_PLL_CLK_OUT_TO_EXT_IO_SEL,
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imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG062);
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writel(AUX_PLL_REFCLK_SEL_SYS_PLL,
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imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG063);
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if (imx8_phy->drvdata->variant != IMX8MM) {
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writel(AUX_PLL_REFCLK_SEL_SYS_PLL,
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imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG063);
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}
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val = ANA_AUX_RX_TX_SEL_TX | ANA_AUX_TX_TERM;
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writel(val | ANA_AUX_RX_TERM_GND_EN,
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imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG064);
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