mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 01:10:04 +00:00
qed: Add nvram selftest
Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
0fefbfbaad
commit
7a4b21b7d1
8 changed files with 267 additions and 0 deletions
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@ -8666,6 +8666,8 @@ struct public_drv_mb {
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#define DRV_MB_PARAM_BIST_REGISTER_TEST 1
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#define DRV_MB_PARAM_BIST_REGISTER_TEST 1
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#define DRV_MB_PARAM_BIST_CLOCK_TEST 2
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#define DRV_MB_PARAM_BIST_CLOCK_TEST 2
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#define DRV_MB_PARAM_BIST_NVM_TEST_NUM_IMAGES 3
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#define DRV_MB_PARAM_BIST_NVM_TEST_IMAGE_BY_INDEX 4
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#define DRV_MB_PARAM_BIST_RC_UNKNOWN 0
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#define DRV_MB_PARAM_BIST_RC_UNKNOWN 0
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#define DRV_MB_PARAM_BIST_RC_PASSED 1
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#define DRV_MB_PARAM_BIST_RC_PASSED 1
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@ -8674,6 +8676,8 @@ struct public_drv_mb {
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#define DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT 0
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#define DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT 0
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#define DRV_MB_PARAM_BIST_TEST_INDEX_MASK 0x000000FF
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#define DRV_MB_PARAM_BIST_TEST_INDEX_MASK 0x000000FF
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#define DRV_MB_PARAM_BIST_TEST_IMAGE_INDEX_SHIFT 8
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#define DRV_MB_PARAM_BIST_TEST_IMAGE_INDEX_MASK 0x0000FF00
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u32 fw_mb_header;
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u32 fw_mb_header;
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#define FW_MSG_CODE_MASK 0xffff0000
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#define FW_MSG_CODE_MASK 0xffff0000
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@ -1508,6 +1508,7 @@ static struct qed_selftest_ops qed_selftest_ops_pass = {
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.selftest_interrupt = &qed_selftest_interrupt,
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.selftest_interrupt = &qed_selftest_interrupt,
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.selftest_register = &qed_selftest_register,
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.selftest_register = &qed_selftest_register,
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.selftest_clock = &qed_selftest_clock,
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.selftest_clock = &qed_selftest_clock,
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.selftest_nvram = &qed_selftest_nvram,
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};
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};
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const struct qed_common_ops qed_common_ops_pass = {
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const struct qed_common_ops qed_common_ops_pass = {
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@ -1434,6 +1434,52 @@ int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
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return rc;
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return rc;
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}
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}
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int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len)
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{
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u32 bytes_left = len, offset = 0, bytes_to_copy, read_len = 0;
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struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
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u32 resp = 0, resp_param = 0;
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struct qed_ptt *p_ptt;
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int rc = 0;
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p_ptt = qed_ptt_acquire(p_hwfn);
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if (!p_ptt)
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return -EBUSY;
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while (bytes_left > 0) {
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bytes_to_copy = min_t(u32, bytes_left, MCP_DRV_NVM_BUF_LEN);
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rc = qed_mcp_nvm_rd_cmd(p_hwfn, p_ptt,
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DRV_MSG_CODE_NVM_READ_NVRAM,
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addr + offset +
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(bytes_to_copy <<
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DRV_MB_PARAM_NVM_LEN_SHIFT),
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&resp, &resp_param,
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&read_len,
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(u32 *)(p_buf + offset));
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if (rc || (resp != FW_MSG_CODE_NVM_OK)) {
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DP_NOTICE(cdev, "MCP command rc = %d\n", rc);
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break;
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}
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/* This can be a lengthy process, and it's possible scheduler
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* isn't preemptable. Sleep a bit to prevent CPU hogging.
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*/
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if (bytes_left % 0x1000 <
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(bytes_left - read_len) % 0x1000)
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usleep_range(1000, 2000);
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offset += read_len;
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bytes_left -= read_len;
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}
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cdev->mcp_nvm_resp = resp;
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qed_ptt_release(p_hwfn, p_ptt);
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return rc;
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}
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int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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{
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{
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u32 drv_mb_param = 0, rsp, param;
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u32 drv_mb_param = 0, rsp, param;
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@ -1475,3 +1521,51 @@ int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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return rc;
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return rc;
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}
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}
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int qed_mcp_bist_nvm_test_get_num_images(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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u32 *num_images)
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{
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u32 drv_mb_param = 0, rsp;
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int rc = 0;
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drv_mb_param = (DRV_MB_PARAM_BIST_NVM_TEST_NUM_IMAGES <<
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DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT);
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rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BIST_TEST,
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drv_mb_param, &rsp, num_images);
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if (rc)
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return rc;
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if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK))
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rc = -EINVAL;
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return rc;
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}
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int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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struct bist_nvm_image_att *p_image_att,
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u32 image_index)
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{
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u32 buf_size = 0, param, resp = 0, resp_param = 0;
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int rc;
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param = DRV_MB_PARAM_BIST_NVM_TEST_IMAGE_BY_INDEX <<
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DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT;
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param |= image_index << DRV_MB_PARAM_BIST_TEST_IMAGE_INDEX_SHIFT;
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rc = qed_mcp_nvm_rd_cmd(p_hwfn, p_ptt,
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DRV_MSG_CODE_BIST_TEST, param,
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&resp, &resp_param,
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&buf_size,
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(u32 *)p_image_att);
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if (rc)
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return rc;
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if (((resp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK) ||
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(p_image_att->return_code != 1))
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rc = -EINVAL;
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return rc;
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}
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@ -379,6 +379,18 @@ int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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struct qed_ptt *p_ptt,
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enum qed_led_mode mode);
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enum qed_led_mode mode);
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/**
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* @brief Read from nvm
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*
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* @param cdev
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* @param addr - nvm offset
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* @param p_buf - nvm read buffer
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* @param len - buffer len
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*
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* @return int - 0 - operation was successful.
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*/
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int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
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/**
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/**
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* @brief Bist register test
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* @brief Bist register test
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*
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*
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@ -401,6 +413,35 @@ int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
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int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
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int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt);
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struct qed_ptt *p_ptt);
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/**
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* @brief Bist nvm test - get number of images
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*
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* @param p_hwfn - hw function
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* @param p_ptt - PTT required for register access
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* @param num_images - number of images if operation was
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* successful. 0 if not.
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*
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* @return int - 0 - operation was successful.
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*/
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int qed_mcp_bist_nvm_test_get_num_images(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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u32 *num_images);
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/**
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* @brief Bist nvm test - get image attributes by index
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*
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* @param p_hwfn - hw function
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* @param p_ptt - PTT required for register access
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* @param p_image_att - Attributes of image
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* @param image_index - Index of image to get information for
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*
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* @return int - 0 - operation was successful.
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*/
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int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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struct bist_nvm_image_att *p_image_att,
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u32 image_index);
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/* Using hwfn number (and not pf_num) is required since in CMT mode,
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/* Using hwfn number (and not pf_num) is required since in CMT mode,
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* same pf_num may be used by two different hwfn
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* same pf_num may be used by two different hwfn
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* TODO - this shouldn't really be in .h file, but until all fields
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* TODO - this shouldn't really be in .h file, but until all fields
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@ -1,3 +1,4 @@
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#include <linux/crc32.h>
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#include "qed.h"
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#include "qed.h"
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#include "qed_dev_api.h"
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#include "qed_dev_api.h"
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#include "qed_mcp.h"
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#include "qed_mcp.h"
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@ -75,3 +76,103 @@ int qed_selftest_clock(struct qed_dev *cdev)
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return rc;
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return rc;
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}
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}
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int qed_selftest_nvram(struct qed_dev *cdev)
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{
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struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
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struct qed_ptt *p_ptt = qed_ptt_acquire(p_hwfn);
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u32 num_images, i, j, nvm_crc, calc_crc;
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struct bist_nvm_image_att image_att;
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u8 *buf = NULL;
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__be32 val;
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int rc;
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if (!p_ptt) {
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DP_ERR(p_hwfn, "failed to acquire ptt\n");
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return -EBUSY;
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}
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/* Acquire from MFW the amount of available images */
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rc = qed_mcp_bist_nvm_test_get_num_images(p_hwfn, p_ptt, &num_images);
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if (rc || !num_images) {
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DP_ERR(p_hwfn, "Failed getting number of images\n");
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return -EINVAL;
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}
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/* Iterate over images and validate CRC */
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for (i = 0; i < num_images; i++) {
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/* This mailbox returns information about the image required for
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* reading it.
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*/
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rc = qed_mcp_bist_nvm_test_get_image_att(p_hwfn, p_ptt,
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&image_att, i);
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if (rc) {
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DP_ERR(p_hwfn,
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"Failed getting image index %d attributes\n",
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i);
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goto err0;
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}
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/* After MFW crash dump is collected - the image's CRC stops
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* being valid.
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*/
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if (image_att.image_type == NVM_TYPE_MDUMP)
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continue;
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DP_VERBOSE(p_hwfn, QED_MSG_SP, "image index %d, size %x\n",
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i, image_att.len);
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/* Allocate a buffer for holding the nvram image */
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buf = kzalloc(image_att.len, GFP_KERNEL);
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if (!buf) {
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rc = -ENOMEM;
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goto err0;
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}
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/* Read image into buffer */
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rc = qed_mcp_nvm_read(p_hwfn->cdev, image_att.nvm_start_addr,
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buf, image_att.len);
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if (rc) {
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DP_ERR(p_hwfn,
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"Failed reading image index %d from nvm.\n", i);
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goto err1;
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}
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/* Convert the buffer into big-endian format (excluding the
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* closing 4 bytes of CRC).
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*/
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for (j = 0; j < image_att.len - 4; j += 4) {
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val = cpu_to_be32(*(u32 *)&buf[j]);
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*(u32 *)&buf[j] = (__force u32)val;
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}
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/* Calc CRC for the "actual" image buffer, i.e. not including
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* the last 4 CRC bytes.
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*/
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nvm_crc = *(u32 *)(buf + image_att.len - 4);
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calc_crc = crc32(0xffffffff, buf, image_att.len - 4);
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calc_crc = (__force u32)~cpu_to_be32(calc_crc);
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DP_VERBOSE(p_hwfn, QED_MSG_SP,
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"nvm crc 0x%x, calc_crc 0x%x\n", nvm_crc, calc_crc);
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if (calc_crc != nvm_crc) {
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rc = -EINVAL;
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goto err1;
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}
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/* Done with this image; Free to prevent double release
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* on subsequent failure.
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*/
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kfree(buf);
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buf = NULL;
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}
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qed_ptt_release(p_hwfn, p_ptt);
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return 0;
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err1:
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kfree(buf);
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err0:
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qed_ptt_release(p_hwfn, p_ptt);
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return rc;
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}
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@ -37,4 +37,14 @@ int qed_selftest_register(struct qed_dev *cdev);
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* @return int
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* @return int
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*/
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*/
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int qed_selftest_clock(struct qed_dev *cdev);
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int qed_selftest_clock(struct qed_dev *cdev);
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/**
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* @brief qed_selftest_nvram - Perform nvram test
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*
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* @param cdev
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*
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* @return int
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*/
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int qed_selftest_nvram(struct qed_dev *cdev);
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#endif
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#endif
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@ -157,6 +157,7 @@ enum qede_ethtool_tests {
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QEDE_ETHTOOL_MEMORY_TEST,
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QEDE_ETHTOOL_MEMORY_TEST,
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QEDE_ETHTOOL_REGISTER_TEST,
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QEDE_ETHTOOL_REGISTER_TEST,
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QEDE_ETHTOOL_CLOCK_TEST,
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QEDE_ETHTOOL_CLOCK_TEST,
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QEDE_ETHTOOL_NVRAM_TEST,
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QEDE_ETHTOOL_TEST_MAX
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QEDE_ETHTOOL_TEST_MAX
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};
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};
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@ -166,6 +167,7 @@ static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
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"Memory (online)\t\t",
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"Memory (online)\t\t",
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"Register (online)\t",
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"Register (online)\t",
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"Clock (online)\t\t",
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"Clock (online)\t\t",
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"Nvram (online)\t\t",
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};
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};
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static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
|
static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
|
||||||
|
@ -1392,6 +1394,11 @@ static void qede_self_test(struct net_device *dev,
|
||||||
buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
|
buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
|
||||||
etest->flags |= ETH_TEST_FL_FAILED;
|
etest->flags |= ETH_TEST_FL_FAILED;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
|
||||||
|
buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
|
||||||
|
etest->flags |= ETH_TEST_FL_FAILED;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static int qede_set_tunable(struct net_device *dev,
|
static int qede_set_tunable(struct net_device *dev,
|
||||||
|
|
|
@ -402,6 +402,15 @@ struct qed_selftest_ops {
|
||||||
* @return 0 on success, error otherwise.
|
* @return 0 on success, error otherwise.
|
||||||
*/
|
*/
|
||||||
int (*selftest_clock)(struct qed_dev *cdev);
|
int (*selftest_clock)(struct qed_dev *cdev);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief selftest_nvram - Perform nvram test
|
||||||
|
*
|
||||||
|
* @param cdev
|
||||||
|
*
|
||||||
|
* @return 0 on success, error otherwise.
|
||||||
|
*/
|
||||||
|
int (*selftest_nvram) (struct qed_dev *cdev);
|
||||||
};
|
};
|
||||||
|
|
||||||
struct qed_common_ops {
|
struct qed_common_ops {
|
||||||
|
|
Loading…
Reference in a new issue