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Merge branch 'drm-fixes-3.14' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
a few more radeon fixes. * 'drm-fixes-3.14' of git://people.freedesktop.org/~agd5f/linux: drm/radeon/dpm: fix typo in EVERGREEN_SMC_FIRMWARE_HEADER_softRegisters drm/radeon/cik: fix typo in documentation drm/radeon: silence GCC warning on 32 bit drm/radeon: resume old pm late drm/radeon: TTM must be init with cpu-visible VRAM, v2
This commit is contained in:
commit
7a4ee320cd
17 changed files with 22 additions and 26 deletions
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@ -3046,7 +3046,7 @@ static u32 cik_create_bitmask(u32 bit_width)
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}
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/**
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* cik_select_se_sh - select which SE, SH to address
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* cik_get_rb_disabled - computes the mask of disabled RBs
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*
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* @rdev: radeon_device pointer
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* @max_rb_num: max RBs (render backends) for the asic
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@ -7902,7 +7902,8 @@ int cik_resume(struct radeon_device *rdev)
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/* init golden registers */
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cik_init_golden_registers(rdev);
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radeon_pm_resume(rdev);
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if (rdev->pm.pm_method == PM_METHOD_DPM)
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = cik_startup(rdev);
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@ -5299,7 +5299,8 @@ int evergreen_resume(struct radeon_device *rdev)
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/* init golden registers */
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evergreen_init_golden_registers(rdev);
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radeon_pm_resume(rdev);
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if (rdev->pm.pm_method == PM_METHOD_DPM)
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = evergreen_startup(rdev);
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@ -57,7 +57,7 @@ typedef struct SMC_Evergreen_MCRegisters SMC_Evergreen_MCRegisters;
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#define EVERGREEN_SMC_FIRMWARE_HEADER_LOCATION 0x100
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#define EVERGREEN_SMC_FIRMWARE_HEADER_softRegisters 0x0
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#define EVERGREEN_SMC_FIRMWARE_HEADER_softRegisters 0x8
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#define EVERGREEN_SMC_FIRMWARE_HEADER_stateTable 0xC
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#define EVERGREEN_SMC_FIRMWARE_HEADER_mcRegisterTable 0x20
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@ -2105,7 +2105,8 @@ int cayman_resume(struct radeon_device *rdev)
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/* init golden registers */
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ni_init_golden_registers(rdev);
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radeon_pm_resume(rdev);
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if (rdev->pm.pm_method == PM_METHOD_DPM)
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = cayman_startup(rdev);
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@ -3942,8 +3942,6 @@ int r100_resume(struct radeon_device *rdev)
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/* Initialize surface registers */
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radeon_surface_init(rdev);
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = r100_startup(rdev);
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if (r) {
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@ -1430,8 +1430,6 @@ int r300_resume(struct radeon_device *rdev)
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/* Initialize surface registers */
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radeon_surface_init(rdev);
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = r300_startup(rdev);
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if (r) {
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@ -325,8 +325,6 @@ int r420_resume(struct radeon_device *rdev)
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/* Initialize surface registers */
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radeon_surface_init(rdev);
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = r420_startup(rdev);
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if (r) {
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@ -240,8 +240,6 @@ int r520_resume(struct radeon_device *rdev)
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/* Initialize surface registers */
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radeon_surface_init(rdev);
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = r520_startup(rdev);
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if (r) {
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@ -2968,7 +2968,8 @@ int r600_resume(struct radeon_device *rdev)
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/* post card */
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atom_asic_init(rdev->mode_info.atom_context);
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radeon_pm_resume(rdev);
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if (rdev->pm.pm_method == PM_METHOD_DPM)
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = r600_startup(rdev);
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@ -1521,13 +1521,16 @@ int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon)
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if (r)
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DRM_ERROR("ib ring test failed (%d).\n", r);
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if (rdev->pm.dpm_enabled) {
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if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
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/* do dpm late init */
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r = radeon_pm_late_init(rdev);
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if (r) {
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rdev->pm.dpm_enabled = false;
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DRM_ERROR("radeon_pm_late_init failed, disabling dpm\n");
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}
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} else {
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/* resume old pm late */
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radeon_pm_resume(rdev);
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}
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radeon_restore_bios_scratch_regs(rdev);
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@ -714,6 +714,9 @@ int radeon_ttm_init(struct radeon_device *rdev)
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DRM_ERROR("Failed initializing VRAM heap.\n");
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return r;
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}
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/* Change the size here instead of the init above so only lpfn is affected */
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radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
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r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
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RADEON_GEM_DOMAIN_VRAM,
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NULL, &rdev->stollen_vga_memory);
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@ -935,7 +938,7 @@ static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
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while (size) {
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loff_t p = *pos / PAGE_SIZE;
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unsigned off = *pos & ~PAGE_MASK;
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ssize_t cur_size = min(size, PAGE_SIZE - off);
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size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
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struct page *page;
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void *ptr;
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@ -474,8 +474,6 @@ int rs400_resume(struct radeon_device *rdev)
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/* Initialize surface registers */
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radeon_surface_init(rdev);
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = rs400_startup(rdev);
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if (r) {
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@ -1048,8 +1048,6 @@ int rs600_resume(struct radeon_device *rdev)
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/* Initialize surface registers */
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radeon_surface_init(rdev);
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = rs600_startup(rdev);
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if (r) {
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@ -756,8 +756,6 @@ int rs690_resume(struct radeon_device *rdev)
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/* Initialize surface registers */
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radeon_surface_init(rdev);
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = rs690_startup(rdev);
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if (r) {
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@ -586,8 +586,6 @@ int rv515_resume(struct radeon_device *rdev)
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/* Initialize surface registers */
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radeon_surface_init(rdev);
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = rv515_startup(rdev);
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if (r) {
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@ -1811,7 +1811,8 @@ int rv770_resume(struct radeon_device *rdev)
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/* init golden registers */
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rv770_init_golden_registers(rdev);
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radeon_pm_resume(rdev);
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if (rdev->pm.pm_method == PM_METHOD_DPM)
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = rv770_startup(rdev);
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@ -6618,7 +6618,8 @@ int si_resume(struct radeon_device *rdev)
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/* init golden registers */
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si_init_golden_registers(rdev);
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radeon_pm_resume(rdev);
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if (rdev->pm.pm_method == PM_METHOD_DPM)
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radeon_pm_resume(rdev);
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rdev->accel_working = true;
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r = si_startup(rdev);
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