powerpc/perf: Freeze PMC5/6 if we're not using them

On Power8 we can freeze PMC5 and 6 if we're not using them. Normally they
run all the time.

As noticed by Anshuman, we should unfreeze them when we disable the PMU
as there are legacy tools which expect them to run all the time.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
CC: <stable@vger.kernel.org> [v3.10]
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Michael Ellerman 2013-06-28 18:15:12 +10:00 committed by Benjamin Herrenschmidt
parent 378a6ee99e
commit 7a7a41f9d5
3 changed files with 8 additions and 2 deletions

View file

@ -626,6 +626,7 @@
#define MMCR0_TRIGGER 0x00002000UL /* TRIGGER enable */
#define MMCR0_PMAO 0x00000080UL /* performance monitor alert has occurred, set to 0 after handling exception */
#define MMCR0_SHRFC 0x00000040UL /* SHRre freeze conditions between threads */
#define MMCR0_FC56 0x00000010UL /* freeze counters 5 and 6 */
#define MMCR0_FCTI 0x00000008UL /* freeze counters in tags inactive mode */
#define MMCR0_FCTA 0x00000004UL /* freeze counters in tags active mode */
#define MMCR0_FCWAIT 0x00000002UL /* freeze counter in WAIT state */

View file

@ -75,6 +75,7 @@ static unsigned int freeze_events_kernel = MMCR0_FCS;
#define MMCR0_FCHV 0
#define MMCR0_PMCjCE MMCR0_PMCnCE
#define MMCR0_FC56 0
#define MMCR0_PMAO 0
#define SPRN_MMCRA SPRN_MMCR2
@ -870,11 +871,11 @@ static void power_pmu_disable(struct pmu *pmu)
}
/*
* Set the 'freeze counters' bit, clear PMAO.
* Set the 'freeze counters' bit, clear PMAO/FC56.
*/
val = mfspr(SPRN_MMCR0);
val |= MMCR0_FC;
val &= ~MMCR0_PMAO;
val &= ~(MMCR0_PMAO | MMCR0_FC56);
/*
* The barrier is to make sure the mtspr has been

View file

@ -391,6 +391,10 @@ static int power8_compute_mmcr(u64 event[], int n_ev,
if (pmc_inuse & 0x7c)
mmcr[0] |= MMCR0_PMCjCE;
/* If we're not using PMC 5 or 6, freeze them */
if (!(pmc_inuse & 0x60))
mmcr[0] |= MMCR0_FC56;
mmcr[1] = mmcr1;
mmcr[2] = mmcra;