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drm/omap: Change the types of struct omap_video_timings members
omap_video_timings struct have the same members as struct videomode, but their types are different. As first step change the types of the omap_video_timings struct members to match their counterpart in struct videomode to catch any type cast related issues. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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parent
d34afb73c3
commit
7aa91e76ae
5 changed files with 15 additions and 14 deletions
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@ -1023,7 +1023,7 @@ static int dsicm_memory_read(struct omap_dss_device *dssdev,
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goto err1;
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}
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size = min(w * h * 3,
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size = min((u32)w * h * 3,
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dssdev->panel.timings.hactive *
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dssdev->panel.timings.vactive * 3);
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@ -2870,7 +2870,8 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
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int wbdelay;
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wbdelay = min(mgr_timings->vfront_porch +
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mgr_timings->vsync_len + mgr_timings->vback_porch, 255);
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mgr_timings->vsync_len + mgr_timings->vback_porch,
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(u32)255);
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/* WBDELAYCOUNT */
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REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), wbdelay, 7, 0);
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@ -3242,7 +3243,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
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ht = timings->pixelclock / xtot;
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vt = timings->pixelclock / xtot / ytot;
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DSSDBG("pck %u\n", timings->pixelclock);
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DSSDBG("pck %lu\n", timings->pixelclock);
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DSSDBG("hsync_len %d hfp %d hbp %d vsw %d vfp %d vbp %d\n",
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t.hsync_len, t.hfront_porch, t.hback_porch,
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t.vsync_len, t.vfront_porch, t.vback_porch);
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@ -351,7 +351,7 @@ static int dpi_set_mode(struct dpi_data *dpi)
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pck = fck / lck_div / pck_div;
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if (pck != t->pixelclock) {
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DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
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DSSWARN("Could not find exact pixel clock. Requested %lu Hz, got %lu Hz\n",
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t->pixelclock, pck);
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t->pixelclock = pck;
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@ -301,23 +301,23 @@ struct omap_dss_dsi_config {
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struct omap_video_timings {
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/* Unit: pixels */
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u16 hactive;
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u32 hactive;
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/* Unit: pixels */
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u16 vactive;
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u32 vactive;
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/* Unit: Hz */
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u32 pixelclock;
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unsigned long pixelclock;
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/* Unit: pixel clocks */
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u16 hsync_len; /* Horizontal synchronization pulse width */
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u32 hsync_len; /* Horizontal synchronization pulse width */
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/* Unit: pixel clocks */
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u16 hfront_porch; /* Horizontal front porch */
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u32 hfront_porch; /* Horizontal front porch */
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/* Unit: pixel clocks */
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u16 hback_porch; /* Horizontal back porch */
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u32 hback_porch; /* Horizontal back porch */
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/* Unit: line clocks */
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u16 vsync_len; /* Vertical synchronization pulse width */
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u32 vsync_len; /* Vertical synchronization pulse width */
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/* Unit: line clocks */
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u16 vfront_porch; /* Vertical front porch */
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u32 vfront_porch; /* Vertical front porch */
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/* Unit: line clocks */
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u16 vback_porch; /* Vertical back porch */
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u32 vback_porch; /* Vertical back porch */
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enum display_flags flags;
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};
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@ -162,7 +162,7 @@ static int sdi_display_enable(struct omap_dss_device *dssdev)
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pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div;
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if (pck != t->pixelclock) {
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DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
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DSSWARN("Could not find exact pixel clock. Requested %lu Hz, got %lu Hz\n",
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t->pixelclock, pck);
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t->pixelclock = pck;
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