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sparc64: Specify user and supervisor trace PCR bits in sparc_pmu.
Signed-off-by: David S. Miller <davem@davemloft.net>
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parent
5344303ca8
commit
7ac2ed286f
1 changed files with 12 additions and 4 deletions
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@ -146,6 +146,8 @@ struct sparc_pmu {
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int upper_shift;
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int lower_shift;
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int event_mask;
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int user_bit;
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int priv_bit;
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int hv_bit;
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int irq_bit;
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int upper_nop;
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@ -306,6 +308,8 @@ static const struct sparc_pmu ultra3_pmu = {
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.upper_shift = 11,
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.lower_shift = 4,
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.event_mask = 0x3f,
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.user_bit = PCR_UTRACE,
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.priv_bit = PCR_STRACE,
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.upper_nop = 0x1c,
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.lower_nop = 0x14,
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.flags = (SPARC_PMU_ALL_EXCLUDES_SAME |
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@ -440,6 +444,8 @@ static const struct sparc_pmu niagara1_pmu = {
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.upper_shift = 0,
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.lower_shift = 4,
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.event_mask = 0x7,
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.user_bit = PCR_UTRACE,
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.priv_bit = PCR_STRACE,
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.upper_nop = 0x0,
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.lower_nop = 0x0,
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.flags = (SPARC_PMU_ALL_EXCLUDES_SAME |
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@ -571,7 +577,9 @@ static const struct sparc_pmu niagara2_pmu = {
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.upper_shift = 19,
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.lower_shift = 6,
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.event_mask = 0xfff,
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.hv_bit = 0x8,
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.user_bit = PCR_UTRACE,
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.priv_bit = PCR_STRACE,
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.hv_bit = PCR_N2_HTRACE,
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.irq_bit = 0x30,
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.upper_nop = 0x220,
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.lower_nop = 0x220,
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@ -771,7 +779,7 @@ static void sparc_pmu_disable(struct pmu *pmu)
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cpuc->n_added = 0;
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val = cpuc->pcr;
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val &= ~(PCR_UTRACE | PCR_STRACE |
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val &= ~(sparc_pmu->user_bit | sparc_pmu->priv_bit |
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sparc_pmu->hv_bit | sparc_pmu->irq_bit);
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cpuc->pcr = val;
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@ -1177,9 +1185,9 @@ static int sparc_pmu_event_init(struct perf_event *event)
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/* We save the enable bits in the config_base. */
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hwc->config_base = sparc_pmu->irq_bit;
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if (!attr->exclude_user)
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hwc->config_base |= PCR_UTRACE;
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hwc->config_base |= sparc_pmu->user_bit;
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if (!attr->exclude_kernel)
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hwc->config_base |= PCR_STRACE;
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hwc->config_base |= sparc_pmu->priv_bit;
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if (!attr->exclude_hv)
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hwc->config_base |= sparc_pmu->hv_bit;
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