msm_serial: fix clock rate on DMA-based uarts

The driver explicitly requests a clock rate for the UART, but it is
off by a factor of four from the dividers that it programs into the
UART.  Fix this by setting the rate to 1/4 of the current value.

Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
David Brown 2012-09-07 14:45:03 -07:00 committed by Greg Kroah-Hartman
parent 43b5f0d692
commit 7b6031a7bc
1 changed files with 1 additions and 1 deletions

View File

@ -896,7 +896,7 @@ static int __init msm_serial_probe(struct platform_device *pdev)
return PTR_ERR(msm_port->clk);
if (msm_port->is_uartdm)
clk_set_rate(msm_port->clk, 7372800);
clk_set_rate(msm_port->clk, 1843200);
port->uartclk = clk_get_rate(msm_port->clk);
printk(KERN_INFO "uartclk = %d\n", port->uartclk);