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gpio: pcie-idio-24: Fix IRQ Enable Register value
commit23a7fdc06e
upstream. This fixes the COS Enable Register value for enabling/disabling the corresponding IRQs bank. Fixes:5855620466
("gpio: Add GPIO support for the ACCES PCIe-IDIO-24 family") Cc: stable@vger.kernel.org Signed-off-by: Arnaud de Turckheim <quarium@gmail.com> Reviewed-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 4 additions and 4 deletions
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@ -360,13 +360,13 @@ static void idio_24_irq_mask(struct irq_data *data)
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unsigned long flags;
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const unsigned long bit_offset = irqd_to_hwirq(data) - 24;
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unsigned char new_irq_mask;
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const unsigned long bank_offset = bit_offset/8 * 8;
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const unsigned long bank_offset = bit_offset / 8;
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unsigned char cos_enable_state;
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raw_spin_lock_irqsave(&idio24gpio->lock, flags);
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idio24gpio->irq_mask &= ~BIT(bit_offset);
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new_irq_mask = idio24gpio->irq_mask >> bank_offset;
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new_irq_mask = idio24gpio->irq_mask >> bank_offset * 8;
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if (!new_irq_mask) {
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cos_enable_state = ioread8(&idio24gpio->reg->cos_enable);
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@ -389,12 +389,12 @@ static void idio_24_irq_unmask(struct irq_data *data)
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unsigned long flags;
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unsigned char prev_irq_mask;
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const unsigned long bit_offset = irqd_to_hwirq(data) - 24;
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const unsigned long bank_offset = bit_offset/8 * 8;
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const unsigned long bank_offset = bit_offset / 8;
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unsigned char cos_enable_state;
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raw_spin_lock_irqsave(&idio24gpio->lock, flags);
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prev_irq_mask = idio24gpio->irq_mask >> bank_offset;
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prev_irq_mask = idio24gpio->irq_mask >> bank_offset * 8;
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idio24gpio->irq_mask |= BIT(bit_offset);
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if (!prev_irq_mask) {
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