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ARM: dts: ixp4xx: Add devicetree for Gateway 7001
This adds a device tree for the Gateway 7001 AP, based on Intel IXP422. Cc: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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2 changed files with 113 additions and 1 deletions
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@ -269,7 +269,8 @@ dtb-$(CONFIG_ARCH_IXP4XX) += \
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intel-ixp42x-gateworks-gw2348.dtb \
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intel-ixp43x-gateworks-gw2358.dtb \
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intel-ixp42x-netgear-wg302v2.dtb \
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intel-ixp42x-arcom-vulcan.dtb
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intel-ixp42x-arcom-vulcan.dtb \
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intel-ixp42x-gateway-7001.dtb
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dtb-$(CONFIG_ARCH_KEYSTONE) += \
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keystone-k2hk-evm.dtb \
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keystone-k2l-evm.dtb \
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111
arch/arm/boot/dts/intel-ixp42x-gateway-7001.dts
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111
arch/arm/boot/dts/intel-ixp42x-gateway-7001.dts
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@ -0,0 +1,111 @@
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// SPDX-License-Identifier: ISC
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/*
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* Device Tree file for Gateway 7001 AP
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* Derived from boardfiles written by Imre Kaloz
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*/
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/dts-v1/;
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#include "intel-ixp42x.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "Gateway 7001 AP";
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compatible = "gateway,7001", "intel,ixp42x";
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#address-cells = <1>;
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#size-cells = <1>;
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memory@0 {
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/* 32 MB SDRAM */
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device_type = "memory";
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reg = <0x00000000 0x2000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200n8";
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stdout-path = "uart1:115200n8";
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};
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aliases {
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/* second UART is the primary console */
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serial0 = &uart1;
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serial1 = &uart0;
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};
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soc {
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bus@c4000000 {
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flash@0,0 {
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compatible = "intel,ixp4xx-flash", "cfi-flash";
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bank-width = <2>;
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/*
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* 8 MB of flash
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*/
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reg = <0 0x00000000 0x800000>;
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/* Configure expansion bus to allow writes */
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intel,ixp4xx-eb-write-enable = <1>;
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partitions {
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compatible = "redboot-fis";
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/* Eraseblock at 0x7e0000 */
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fis-index-block = <0x3f>;
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};
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};
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};
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pci@c0000000 {
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status = "ok";
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/*
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* Taken from Gateway 7001 PCI boardfile (gateway7001-pci.c)
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* We have slots (IDSEL) 1 and 2 with one assigned IRQ
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* each handling all IRQs.
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*/
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interrupt-map =
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/* IDSEL 1 */
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<0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */
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<0x0800 0 0 2 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 11 */
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<0x0800 0 0 3 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 11 */
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<0x0800 0 0 4 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 11 */
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/* IDSEL 2 */
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<0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */
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<0x1000 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 10 */
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<0x1000 0 0 3 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 10 */
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<0x1000 0 0 4 &gpio0 10 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 2 is irq 10 */
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};
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ethernet@c8009000 {
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status = "ok";
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queue-rx = <&qmgr 3>;
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queue-txready = <&qmgr 20>;
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phy-mode = "rgmii";
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phy-handle = <&phy1>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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};
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ethernet@c800a000 {
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status = "ok";
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queue-rx = <&qmgr 4>;
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queue-txready = <&qmgr 21>;
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phy-mode = "rgmii";
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phy-handle = <&phy2>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy2: ethernet-phy@2 {
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reg = <2>;
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};
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};
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};
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};
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};
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