firmware: arm_scmi: Use common iterators in the clock protocol
Make SCMI clock protocol use the common iterator protocol helpers for issuing the multi-part commands. Link: https://lore.kernel.org/r/20220330150551.2573938-17-cristian.marussi@arm.com Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
This commit is contained in:
Cristian Marussi
Sudeep Holla
parent
802b0bed01
commit
7bc7caafe6
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@ -164,81 +164,111 @@ static int rate_cmp_func(const void *_r1, const void *_r2)
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return 1;
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}
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struct scmi_clk_ipriv {
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u32 clk_id;
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struct scmi_clock_info *clk;
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};
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static void iter_clk_describe_prepare_message(void *message,
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const unsigned int desc_index,
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const void *priv)
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{
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struct scmi_msg_clock_describe_rates *msg = message;
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const struct scmi_clk_ipriv *p = priv;
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msg->id = cpu_to_le32(p->clk_id);
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/* Set the number of rates to be skipped/already read */
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msg->rate_index = cpu_to_le32(desc_index);
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}
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static int
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iter_clk_describe_update_state(struct scmi_iterator_state *st,
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const void *response, void *priv)
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{
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u32 flags;
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struct scmi_clk_ipriv *p = priv;
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const struct scmi_msg_resp_clock_describe_rates *r = response;
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flags = le32_to_cpu(r->num_rates_flags);
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st->num_remaining = NUM_REMAINING(flags);
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st->num_returned = NUM_RETURNED(flags);
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p->clk->rate_discrete = RATE_DISCRETE(flags);
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return 0;
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}
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static int
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iter_clk_describe_process_response(const struct scmi_protocol_handle *ph,
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const void *response,
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struct scmi_iterator_state *st, void *priv)
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{
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int ret = 0;
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struct scmi_clk_ipriv *p = priv;
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const struct scmi_msg_resp_clock_describe_rates *r = response;
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if (!p->clk->rate_discrete) {
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switch (st->desc_index + st->loop_idx) {
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case 0:
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p->clk->range.min_rate = RATE_TO_U64(r->rate[0]);
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break;
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case 1:
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p->clk->range.max_rate = RATE_TO_U64(r->rate[1]);
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break;
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case 2:
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p->clk->range.step_size = RATE_TO_U64(r->rate[2]);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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} else {
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u64 *rate = &p->clk->list.rates[st->desc_index + st->loop_idx];
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*rate = RATE_TO_U64(r->rate[st->loop_idx]);
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p->clk->list.num_rates++;
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//XXX dev_dbg(ph->dev, "Rate %llu Hz\n", *rate);
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}
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return ret;
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}
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static int
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scmi_clock_describe_rates_get(const struct scmi_protocol_handle *ph, u32 clk_id,
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struct scmi_clock_info *clk)
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{
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u64 *rate = NULL;
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int ret, cnt;
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bool rate_discrete = false;
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u32 tot_rate_cnt = 0, rates_flag;
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u16 num_returned, num_remaining;
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struct scmi_xfer *t;
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struct scmi_msg_clock_describe_rates *clk_desc;
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struct scmi_msg_resp_clock_describe_rates *rlist;
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int ret;
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ret = ph->xops->xfer_get_init(ph, CLOCK_DESCRIBE_RATES,
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sizeof(*clk_desc), 0, &t);
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void *iter;
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struct scmi_msg_clock_describe_rates *msg;
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struct scmi_iterator_ops ops = {
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.prepare_message = iter_clk_describe_prepare_message,
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.update_state = iter_clk_describe_update_state,
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.process_response = iter_clk_describe_process_response,
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};
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struct scmi_clk_ipriv cpriv = {
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.clk_id = clk_id,
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.clk = clk,
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};
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iter = ph->hops->iter_response_init(ph, &ops, SCMI_MAX_NUM_RATES,
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CLOCK_DESCRIBE_RATES,
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sizeof(*msg), &cpriv);
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if (IS_ERR(iter))
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return PTR_ERR(iter);
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ret = ph->hops->iter_response_run(iter);
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if (ret)
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return ret;
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clk_desc = t->tx.buf;
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rlist = t->rx.buf;
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do {
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clk_desc->id = cpu_to_le32(clk_id);
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/* Set the number of rates to be skipped/already read */
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clk_desc->rate_index = cpu_to_le32(tot_rate_cnt);
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ret = ph->xops->do_xfer(ph, t);
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if (ret)
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goto err;
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rates_flag = le32_to_cpu(rlist->num_rates_flags);
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num_remaining = NUM_REMAINING(rates_flag);
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rate_discrete = RATE_DISCRETE(rates_flag);
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num_returned = NUM_RETURNED(rates_flag);
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if (tot_rate_cnt + num_returned > SCMI_MAX_NUM_RATES) {
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dev_err(ph->dev, "No. of rates > MAX_NUM_RATES");
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break;
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}
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if (!rate_discrete) {
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clk->range.min_rate = RATE_TO_U64(rlist->rate[0]);
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clk->range.max_rate = RATE_TO_U64(rlist->rate[1]);
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clk->range.step_size = RATE_TO_U64(rlist->rate[2]);
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dev_dbg(ph->dev, "Min %llu Max %llu Step %llu Hz\n",
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clk->range.min_rate, clk->range.max_rate,
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clk->range.step_size);
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break;
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}
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rate = &clk->list.rates[tot_rate_cnt];
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for (cnt = 0; cnt < num_returned; cnt++, rate++) {
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*rate = RATE_TO_U64(rlist->rate[cnt]);
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dev_dbg(ph->dev, "Rate %llu Hz\n", *rate);
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}
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tot_rate_cnt += num_returned;
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ph->xops->reset_rx_to_maxsz(ph, t);
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/*
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* check for both returned and remaining to avoid infinite
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* loop due to buggy firmware
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*/
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} while (num_returned && num_remaining);
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if (rate_discrete && rate) {
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clk->list.num_rates = tot_rate_cnt;
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sort(clk->list.rates, tot_rate_cnt, sizeof(*rate),
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rate_cmp_func, NULL);
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if (!clk->rate_discrete) {
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dev_dbg(ph->dev, "Min %llu Max %llu Step %llu Hz\n",
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clk->range.min_rate, clk->range.max_rate,
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clk->range.step_size);
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} else if (clk->list.num_rates) {
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sort(clk->list.rates, clk->list.num_rates,
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sizeof(clk->list.rates[0]), rate_cmp_func, NULL);
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}
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clk->rate_discrete = rate_discrete;
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err:
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ph->xops->xfer_put(ph, t);
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return ret;
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}
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