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drm/xe: Reinstate media GT support

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Now that tiles and GTs are handled separately and other prerequisite
changes are in place, we're ready to re-enable the media GT.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230601215244.678611-31-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Matt Roper 2023-06-01 14:52:43 -07:00 committed by Rodrigo Vivi
parent 1bc728dcb8
commit 7bfbad97d3
2 changed files with 33 additions and 1 deletions
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8
drivers/gpu/drm/xe/regs/xe_gt_regs.h
View file

@ -8,6 +8,14 @@
#include "regs/xe_reg_defs.h"
/*
* The GSI register range [0x0 - 0x40000) is replicated at a higher offset
* for the media GT. xe_mmio and xe_gt_mcr functions will automatically
* translate offsets by MEDIA_GT_GSI_OFFSET when operating on the media GT.
*/
#define MEDIA_GT_GSI_OFFSET 0x380000
#define MEDIA_GT_GSI_LENGTH 0x40000
/* RPM unit config (Gen8+) */
#define RPM_CONFIG0 XE_REG(0xd00)
#define RPM_CONFIG0_CRYSTAL_CLOCK_FREQ_MASK REG_GENMASK(5, 3)

26
drivers/gpu/drm/xe/xe_pci.c
View file

@ -545,7 +545,31 @@ static int xe_info_init(struct xe_device *xe,
if (MEDIA_VER(xe) < 13 && media_desc)
gt->info.__engine_mask |= media_desc->hw_engine_mask;
/* TODO: Init media GT, if present */
if (MEDIA_VER(xe) < 13 || !media_desc)
continue;
/*
* Allocate and setup media GT for platforms with standalone
* media.
*/
tile->media_gt = xe_gt_alloc(tile);
if (IS_ERR(tile->media_gt))
return PTR_ERR(tile->media_gt);
gt = tile->media_gt;
gt->info.type = XE_GT_TYPE_MEDIA;
gt->info.__engine_mask = media_desc->hw_engine_mask;
gt->mmio.adj_offset = MEDIA_GT_GSI_OFFSET;
gt->mmio.adj_limit = MEDIA_GT_GSI_LENGTH;
/*
* FIXME: At the moment multi-tile and standalone media are
* mutually exclusive on current platforms. We'll need to
* come up with a better way to number GTs if we ever wind
* up with platforms that support both together.
*/
drm_WARN_ON(&xe->drm, id != 0);
gt->info.id = 1;
}
return 0;