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sparc: io: remove duplicate relaxed accessors on sparc32 

Commit 1191ccb34c ("sparc: io: implement dummy relaxed accessor
macros for writes") added the relaxed accessors (readl_relaxed etc) in
a file that is shared between sparc32 and sparc64. However, the earlier
e1039fb426 ("sparc32: introduce asm-generic/io.h") had already changed
the sparc32 implementation to use asm-generic/io.h, which provides the
same macros, resulting in lots of build errors.

This moves the definitions from the shared sparc file into the
sparc64-only file to fix the sparc32 build regression.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Fixes: 1191ccb34c ("sparc: io: implement dummy relaxed accessor macros for writes")
This commit is contained in:
Arnd Bergmann 2014-11-19 10:15:33 +01:00
parent 1c8d29696f
commit 7c3969c3a4
2 changed files with 6 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
arch/sparc/include/asm/io.h
View File

@ -10,15 +10,6 @@
* Defines used for both SPARC32 and SPARC64
*/
/* Relaxed accessors for MMIO */
#define readb_relaxed(__addr) readb(__addr)
#define readw_relaxed(__addr) readw(__addr)
#define readl_relaxed(__addr) readl(__addr)
#define writeb_relaxed(__b, __addr) writeb(__b, __addr)
#define writew_relaxed(__w, __addr) writew(__w, __addr)
#define writel_relaxed(__l, __addr) writel(__l, __addr)
/* Big endian versions of memory read/write routines */
#define readb_be(__addr) __raw_readb(__addr)
#define readw_be(__addr) __raw_readw(__addr)

6
arch/sparc/include/asm/io_64.h
View File

@ -101,6 +101,7 @@ static inline void __raw_writeq(u64 q, const volatile void __iomem *addr)
* the cache by using ASI_PHYS_BYPASS_EC_E_L
*/
#define readb readb
#define readb_relaxed readb
static inline u8 readb(const volatile void __iomem *addr)
{ u8 ret;
@ -112,6 +113,7 @@ static inline u8 readb(const volatile void __iomem *addr)
}
#define readw readw
#define readw_relaxed readw
static inline u16 readw(const volatile void __iomem *addr)
{ u16 ret;
@ -124,6 +126,7 @@ static inline u16 readw(const volatile void __iomem *addr)
}
#define readl readl
#define readl_relaxed readl
static inline u32 readl(const volatile void __iomem *addr)
{ u32 ret;
@ -149,6 +152,7 @@ static inline u64 readq(const volatile void __iomem *addr)
}
#define writeb writeb
#define writeb_relaxed writeb
static inline void writeb(u8 b, volatile void __iomem *addr)
{
__asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
@ -158,6 +162,7 @@ static inline void writeb(u8 b, volatile void __iomem *addr)
}
#define writew writew
#define writew_relaxed writew
static inline void writew(u16 w, volatile void __iomem *addr)
{
__asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
@ -167,6 +172,7 @@ static inline void writew(u16 w, volatile void __iomem *addr)
}
#define writel writel
#define writel_relaxed writel
static inline void writel(u32 l, volatile void __iomem *addr)
{
__asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"