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ARM: S5PC100: Modify platform data for pl330 driver
With the 'struct dma_pl330_peri' removed, the platfrom data for dma driver can be simplified to a simple list of peripheral request ids. Cc: Jassi Brar <jassisinghbrar@gmail.com> Acked-by: Boojin Kim <boojin.kim@samsung.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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dc732f50e2
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1 changed files with 69 additions and 178 deletions
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@ -35,100 +35,42 @@
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static u64 dma_dmamask = DMA_BIT_MASK(32);
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struct dma_pl330_peri pdma0_peri[30] = {
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{
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.peri_id = (u8)DMACH_UART0_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_UART0_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_UART1_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_UART1_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_UART2_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_UART2_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_UART3_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_UART3_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = DMACH_IRDA,
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}, {
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.peri_id = (u8)DMACH_I2S0_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_I2S0_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_I2S0S_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_I2S1_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_I2S1_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_I2S2_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_I2S2_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_SPI0_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_SPI0_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_SPI1_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_SPI1_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_SPI2_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_SPI2_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_AC97_MICIN,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_AC97_PCMIN,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_AC97_PCMOUT,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_EXTERNAL,
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}, {
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.peri_id = (u8)DMACH_PWM,
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}, {
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.peri_id = (u8)DMACH_SPDIF,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_HSI_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_HSI_TX,
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.rqtype = MEMTODEV,
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},
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u8 pdma0_peri[] = {
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DMACH_UART0_RX,
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DMACH_UART0_TX,
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DMACH_UART1_RX,
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DMACH_UART1_TX,
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DMACH_UART2_RX,
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DMACH_UART2_TX,
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DMACH_UART3_RX,
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DMACH_UART3_TX,
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DMACH_IRDA,
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DMACH_I2S0_RX,
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DMACH_I2S0_TX,
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DMACH_I2S0S_TX,
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DMACH_I2S1_RX,
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DMACH_I2S1_TX,
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DMACH_I2S2_RX,
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DMACH_I2S2_TX,
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DMACH_SPI0_RX,
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DMACH_SPI0_TX,
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DMACH_SPI1_RX,
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DMACH_SPI1_TX,
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DMACH_SPI2_RX,
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DMACH_SPI2_TX,
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DMACH_AC97_MICIN,
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DMACH_AC97_PCMIN,
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DMACH_AC97_PCMOUT,
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DMACH_EXTERNAL,
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DMACH_PWM,
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DMACH_SPDIF,
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DMACH_HSI_RX,
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DMACH_HSI_TX,
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};
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struct dma_pl330_platdata s5pc100_pdma0_pdata = {
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.nr_valid_peri = ARRAY_SIZE(pdma0_peri),
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.peri = pdma0_peri,
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.peri_id = pdma0_peri,
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};
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struct amba_device s5pc100_device_pdma0 = {
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@ -147,98 +89,42 @@ struct amba_device s5pc100_device_pdma0 = {
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.periphid = 0x00041330,
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};
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struct dma_pl330_peri pdma1_peri[30] = {
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{
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.peri_id = (u8)DMACH_UART0_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_UART0_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_UART1_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_UART1_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_UART2_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_UART2_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_UART3_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_UART3_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = DMACH_IRDA,
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}, {
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.peri_id = (u8)DMACH_I2S0_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_I2S0_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_I2S0S_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_I2S1_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_I2S1_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_I2S2_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_I2S2_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_SPI0_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_SPI0_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_SPI1_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_SPI1_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_SPI2_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_SPI2_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_PCM0_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_PCM1_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_PCM1_RX,
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.rqtype = DEVTOMEM,
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}, {
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.peri_id = (u8)DMACH_PCM1_TX,
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.rqtype = MEMTODEV,
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}, {
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.peri_id = (u8)DMACH_MSM_REQ0,
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}, {
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.peri_id = (u8)DMACH_MSM_REQ1,
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}, {
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.peri_id = (u8)DMACH_MSM_REQ2,
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}, {
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.peri_id = (u8)DMACH_MSM_REQ3,
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},
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u8 pdma1_peri[] = {
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DMACH_UART0_RX,
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DMACH_UART0_TX,
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DMACH_UART1_RX,
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DMACH_UART1_TX,
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DMACH_UART2_RX,
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DMACH_UART2_TX,
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DMACH_UART3_RX,
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DMACH_UART3_TX,
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DMACH_IRDA,
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DMACH_I2S0_RX,
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DMACH_I2S0_TX,
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DMACH_I2S0S_TX,
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DMACH_I2S1_RX,
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DMACH_I2S1_TX,
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DMACH_I2S2_RX,
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DMACH_I2S2_TX,
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DMACH_SPI0_RX,
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DMACH_SPI0_TX,
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DMACH_SPI1_RX,
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DMACH_SPI1_TX,
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DMACH_SPI2_RX,
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DMACH_SPI2_TX,
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DMACH_PCM0_RX,
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DMACH_PCM0_TX,
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DMACH_PCM1_RX,
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DMACH_PCM1_TX,
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DMACH_MSM_REQ0,
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DMACH_MSM_REQ1,
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DMACH_MSM_REQ2,
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DMACH_MSM_REQ3,
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};
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struct dma_pl330_platdata s5pc100_pdma1_pdata = {
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.nr_valid_peri = ARRAY_SIZE(pdma1_peri),
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.peri = pdma1_peri,
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.peri_id = pdma1_peri,
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};
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struct amba_device s5pc100_device_pdma1 = {
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@ -259,7 +145,12 @@ struct amba_device s5pc100_device_pdma1 = {
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static int __init s5pc100_dma_init(void)
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{
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dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask);
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dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask);
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amba_device_register(&s5pc100_device_pdma0, &iomem_resource);
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dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask);
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dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask);
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amba_device_register(&s5pc100_device_pdma1, &iomem_resource);
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return 0;
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