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drm/i915/huc: New HuC status register for Gen11

Browse source 
Gen11 defines new register for checking HuC authentication status.
Look into the right register and bit.

v2: use reg/mask/value instead of dedicated functions (Daniele)

BSpec: 19686

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Cc: John Spotswood <john.a.spotswood@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190527183613.17076-11-michal.wajdeczko@intel.com
This commit is contained in:
Michal Wajdeczko 2019-05-27 18:36:06 +00:00 committed by Chris Wilson
parent 2d4ed3a988
commit 7c5ae251b0
3 changed files with 29 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
drivers/gpu/drm/i915/intel_guc_reg.h
View file

@ -79,6 +79,9 @@
#define HUC_STATUS2 _MMIO(0xD3B0)
#define HUC_FW_VERIFIED (1<<7)
#define GEN11_HUC_KERNEL_LOAD_INFO _MMIO(0xC1DC)
#define HUC_LOAD_SUCCESSFUL (1 << 0)
#define GUC_WOPCM_SIZE _MMIO(0xc050)
#define GUC_WOPCM_SIZE_LOCKED (1<<0)
#define GUC_WOPCM_SIZE_SHIFT 12

26
drivers/gpu/drm/i915/intel_huc.c
View file

@ -29,7 +29,19 @@
void intel_huc_init_early(struct intel_huc *huc)
{
struct drm_i915_private *i915 = huc_to_i915(huc);
intel_huc_fw_init_early(huc);
if (INTEL_GEN(i915) >= 11) {
huc->status.reg = GEN11_HUC_KERNEL_LOAD_INFO;
huc->status.mask = HUC_LOAD_SUCCESSFUL;
huc->status.value = HUC_LOAD_SUCCESSFUL;
} else {
huc->status.reg = HUC_STATUS2;
huc->status.mask = HUC_FW_VERIFIED;
huc->status.value = HUC_FW_VERIFIED;
}
}
int intel_huc_init_misc(struct intel_huc *huc)
@ -110,7 +122,6 @@ int intel_huc_auth(struct intel_huc *huc)
{
struct drm_i915_private *i915 = huc_to_i915(huc);
struct intel_guc *guc = &i915->guc;
u32 status;
int ret;
if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
@ -125,12 +136,12 @@ int intel_huc_auth(struct intel_huc *huc)
/* Check authentication status, it should be done by now */
ret = __intel_wait_for_register(&i915->uncore,
HUC_STATUS2,
HUC_FW_VERIFIED,
HUC_FW_VERIFIED,
2, 50, &status);
huc->status.reg,
huc->status.mask,
huc->status.value,
2, 50, NULL);
if (ret) {
DRM_ERROR("HuC: Firmware not verified %#x\n", status);
DRM_ERROR("HuC: Firmware not verified %d\n", ret);
goto fail;
}
@ -164,7 +175,8 @@ int intel_huc_check_status(struct intel_huc *huc)
return -ENODEV;
with_intel_runtime_pm(dev_priv, wakeref)
status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
status = (I915_READ(huc->status.reg) & huc->status.mask) ==
huc->status.value;
return status;
}

7
drivers/gpu/drm/i915/intel_huc.h
View file

@ -25,6 +25,7 @@
#ifndef _INTEL_HUC_H_
#define _INTEL_HUC_H_
#include "i915_reg.h"
#include "intel_uc_fw.h"
#include "intel_huc_fw.h"
@ -35,6 +36,12 @@ struct intel_huc {
/* HuC-specific additions */
struct i915_vma *rsa_data;
void *rsa_data_vaddr;
struct {
i915_reg_t reg;
u32 mask;
u32 value;
} status;
};
void intel_huc_init_early(struct intel_huc *huc);